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authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:20 -0700
commit25884a87733cd35ef6613aaef9a8a08194267552 (patch)
tree3eb831102c76206ba5ba4e19b94810be67ce108f /src/arch/mips/regfile
parent32daf6fc3fd34af0023ae74c2a1f8dd597f87242 (diff)
downloadgem5-25884a87733cd35ef6613aaef9a8a08194267552.tar.xz
Registers: Get rid of the float register width parameter.
Diffstat (limited to 'src/arch/mips/regfile')
-rw-r--r--src/arch/mips/regfile/float_regfile.cc95
-rw-r--r--src/arch/mips/regfile/float_regfile.hh26
-rw-r--r--src/arch/mips/regfile/regfile.cc36
-rw-r--r--src/arch/mips/regfile/regfile.hh8
4 files changed, 28 insertions, 137 deletions
diff --git a/src/arch/mips/regfile/float_regfile.cc b/src/arch/mips/regfile/float_regfile.cc
index 2b32bd3af..884c59cc0 100644
--- a/src/arch/mips/regfile/float_regfile.cc
+++ b/src/arch/mips/regfile/float_regfile.cc
@@ -38,114 +38,43 @@ using namespace std;
void
FloatRegFile::clear()
{
- bzero(&regs, sizeof(regs));
+ bzero(regs.q, sizeof(regs.q));
}
-double
-FloatRegFile::readReg(int floatReg, int width, ThreadID tid)
+FloatReg
+FloatRegFile::readReg(int floatReg)
{
- switch(width)
- {
- case SingleWidth:
- {
- void *float_ptr = &regs[floatReg];
- return *(float *) float_ptr;
- }
-
- case DoubleWidth:
- {
- uint64_t double_val = (FloatReg64)regs[floatReg + 1] << 32 | regs[floatReg];
- void *double_ptr = &double_val;
- return *(double *) double_ptr;
- }
-
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
+ return regs.s[floatReg];
}
FloatRegBits
-FloatRegFile::readRegBits(int floatReg, int width, ThreadID tid)
+FloatRegFile::readRegBits(int floatReg)
{
- if (floatReg < NumFloatArchRegs - 1) {
- switch(width)
- {
- case SingleWidth:
- return regs[floatReg];
-
- case DoubleWidth:
- return (FloatReg64)regs[floatReg + 1] << 32 | regs[floatReg];
-
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
- } else {
- if (width > SingleWidth)
- assert("Control Regs are only 32 bits wide");
-
- return regs[floatReg];
- }
+ return regs.q[floatReg];
}
Fault
-FloatRegFile::setReg(int floatReg, const FloatRegVal &val, int width,
- ThreadID tid)
+FloatRegFile::setReg(int floatReg, const FloatReg &val)
{
- switch(width)
- {
- case SingleWidth:
- {
- float temp = val;
- void *float_ptr = &temp;
- regs[floatReg] = *(FloatReg32 *) float_ptr;
- break;
- }
-
- case DoubleWidth:
- {
- const void *double_ptr = &val;
- FloatReg64 temp_double = *(FloatReg64 *) double_ptr;
- regs[floatReg + 1] = bits(temp_double, 63, 32);
- regs[floatReg] = bits(temp_double, 31, 0);
- break;
- }
-
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
-
+ regs.s[floatReg] = val;
return NoFault;
}
Fault
-FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val, int width,
- ThreadID tid)
+FloatRegFile::setRegBits(int floatReg, const FloatRegBits &val)
{
- switch(width)
- {
- case SingleWidth:
- regs[floatReg] = val;
- break;
-
- case DoubleWidth:
- regs[floatReg + 1] = bits(val, 63, 32);
- regs[floatReg] = bits(val, 31, 0);
- break;
-
- default:
- panic("Attempted to read a %d bit floating point register!", width);
- }
+ regs.q[floatReg] = val;
return NoFault;
}
void
FloatRegFile::serialize(std::ostream &os)
{
- SERIALIZE_ARRAY(regs, NumFloatRegs);
+ SERIALIZE_ARRAY(regs.q, NumFloatRegs);
}
void
FloatRegFile::unserialize(Checkpoint *cp, const std::string &section)
{
- UNSERIALIZE_ARRAY(regs, NumFloatRegs);
+ UNSERIALIZE_ARRAY(regs.q, NumFloatRegs);
}
diff --git a/src/arch/mips/regfile/float_regfile.hh b/src/arch/mips/regfile/float_regfile.hh
index afe6701c5..5a641887c 100644
--- a/src/arch/mips/regfile/float_regfile.hh
+++ b/src/arch/mips/regfile/float_regfile.hh
@@ -70,30 +70,20 @@ namespace MipsISA
Cause_Field = 11
};
- const int SingleWidth = 32;
- const int SingleBytes = SingleWidth / 4;
-
- const int DoubleWidth = 64;
- const int DoubleBytes = DoubleWidth / 4;
-
- const int QuadWidth = 128;
- const int QuadBytes = QuadWidth / 4;
-
class FloatRegFile
{
protected:
- FloatReg32 regs[NumFloatRegs];
+ union {
+ FloatReg s[NumFloatRegs];
+ FloatRegBits q[NumFloatRegs];
+ } regs;
public:
- static const int regWidth = SingleWidth;
-
void clear();
- double readReg(int floatReg, int width, ThreadID tid = 0);
- FloatRegBits readRegBits(int floatReg, int width, ThreadID tid = 0);
- Fault setReg(int floatReg, const FloatRegVal &val, int width,
- ThreadID tid = 0);
- Fault setRegBits(int floatReg, const FloatRegBits &val, int width,
- ThreadID tid = 0);
+ FloatReg readReg(int floatReg);
+ FloatRegBits readRegBits(int floatReg);
+ Fault setReg(int floatReg, const FloatReg &val);
+ Fault setRegBits(int floatReg, const FloatRegBits &val);
void serialize(std::ostream &os);
void unserialize(Checkpoint *cp, const std::string &section);
diff --git a/src/arch/mips/regfile/regfile.cc b/src/arch/mips/regfile/regfile.cc
index 2b70ea9bd..e7ba5a2ca 100644
--- a/src/arch/mips/regfile/regfile.cc
+++ b/src/arch/mips/regfile/regfile.cc
@@ -64,52 +64,28 @@ RegFile::setIntReg(int intReg, const IntReg &val)
return intRegFile.setReg(intReg, val);
}
-FloatRegVal
+FloatReg
RegFile::readFloatReg(int floatReg)
{
- return floatRegFile.readReg(floatReg,SingleWidth);
-}
-
-FloatRegVal
-RegFile::readFloatReg(int floatReg, int width)
-{
- return floatRegFile.readReg(floatReg,width);
+ return floatRegFile.readReg(floatReg);
}
FloatRegBits
RegFile::readFloatRegBits(int floatReg)
{
- return floatRegFile.readRegBits(floatReg,SingleWidth);
-}
-
-FloatRegBits
-RegFile::readFloatRegBits(int floatReg, int width)
-{
- return floatRegFile.readRegBits(floatReg,width);
+ return floatRegFile.readRegBits(floatReg);
}
Fault
-RegFile::setFloatReg(int floatReg, const FloatRegVal &val)
+RegFile::setFloatReg(int floatReg, const FloatReg &val)
{
- return floatRegFile.setReg(floatReg, val, SingleWidth);
-}
-
-Fault
-RegFile::setFloatReg(int floatReg, const FloatRegVal &val, int width)
-{
- return floatRegFile.setReg(floatReg, val, width);
+ return floatRegFile.setReg(floatReg, val);
}
Fault
RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val)
{
- return floatRegFile.setRegBits(floatReg, val, SingleWidth);
-}
-
-Fault
-RegFile::setFloatRegBits(int floatReg, const FloatRegBits &val, int width)
-{
- return floatRegFile.setRegBits(floatReg, val, width);
+ return floatRegFile.setRegBits(floatReg, val);
}
void
diff --git a/src/arch/mips/regfile/regfile.hh b/src/arch/mips/regfile/regfile.hh
index b05f513b4..55b22638b 100644
--- a/src/arch/mips/regfile/regfile.hh
+++ b/src/arch/mips/regfile/regfile.hh
@@ -66,14 +66,10 @@ namespace MipsISA
Fault setIntReg(int intReg, const IntReg &val);
- FloatRegVal readFloatReg(int floatReg);
- FloatRegVal readFloatReg(int floatReg, int width);
+ FloatReg readFloatReg(int floatReg);
FloatRegBits readFloatRegBits(int floatReg);
- FloatRegBits readFloatRegBits(int floatReg, int width);
- Fault setFloatReg(int floatReg, const FloatRegVal &val);
- Fault setFloatReg(int floatReg, const FloatRegVal &val, int width);
+ Fault setFloatReg(int floatReg, const FloatReg &val);
Fault setFloatRegBits(int floatReg, const FloatRegBits &val);
- Fault setFloatRegBits(int floatReg, const FloatRegBits &val, int width);
void setShadowSet(int css);