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authorAli Saidi <saidi@eecs.umich.edu>2008-09-10 14:26:15 -0400
committerAli Saidi <saidi@eecs.umich.edu>2008-09-10 14:26:15 -0400
commit3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0 (patch)
treec9e147a14bcab9e4767ad13a00ac4a375044c441 /src/arch/mips/regfile
parent09a8fb0b5263d4b41b8206ce075a3f6923907d65 (diff)
downloadgem5-3a3e356f4e61e86f6f1427dd85cf1e41fa9125c0.tar.xz
style: Remove non-leading tabs everywhere they shouldn't be. Developers should configure their editors to not insert tabs
Diffstat (limited to 'src/arch/mips/regfile')
-rw-r--r--src/arch/mips/regfile/regfile.hh12
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/mips/regfile/regfile.hh b/src/arch/mips/regfile/regfile.hh
index 8304b7cda..407d9b50a 100644
--- a/src/arch/mips/regfile/regfile.hh
+++ b/src/arch/mips/regfile/regfile.hh
@@ -48,15 +48,15 @@ namespace MipsISA
{
class RegFile {
protected:
- Addr pc; // program counter
- Addr npc; // next-cycle program counter
- Addr nnpc; // next-next-cycle program counter
+ Addr pc; // program counter
+ Addr npc; // next-cycle program counter
+ Addr nnpc; // next-next-cycle program counter
// used to implement branch delay slot
// not real register
- IntRegFile intRegFile; // (signed) integer register file
- FloatRegFile floatRegFile; // floating point register file
- MiscRegFile miscRegFile; // control register file
+ IntRegFile intRegFile; // (signed) integer register file
+ FloatRegFile floatRegFile; // floating point register file
+ MiscRegFile miscRegFile; // control register file
public:
void clear();