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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
commit | b398b8ff1ba7e181e010afd6219074cf6f683820 (patch) | |
tree | b41c9b78594bde90e77fa0e7b2e806e306e2ebad /src/arch/mips/tlb.cc | |
parent | 997f36c7115e37f292c50db8986c6ebd4bd1beca (diff) | |
download | gem5-b398b8ff1ba7e181e010afd6219074cf6f683820.tar.xz |
Registers: Add a registers.hh file as an ISA switched header.
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
Diffstat (limited to 'src/arch/mips/tlb.cc')
-rw-r--r-- | src/arch/mips/tlb.cc | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc index 001dc2cb7..18a29122c 100644 --- a/src/arch/mips/tlb.cc +++ b/src/arch/mips/tlb.cc @@ -58,6 +58,21 @@ using namespace MipsISA; #define MODE2MASK(X) (1 << (X)) +static inline mode_type +getOperatingMode(MiscReg Stat) +{ + if((Stat & 0x10000006) != 0 || (Stat & 0x18) ==0) { + return mode_kernel; + } else if((Stat & 0x18) == 0x8) { + return mode_supervisor; + } else if((Stat & 0x18) == 0x10) { + return mode_user; + } else { + return mode_number; + } +} + + TLB::TLB(const Params *p) : BaseTLB(p), size(p->size), nlu(0) { |