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author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-08 23:02:21 -0700 |
commit | b398b8ff1ba7e181e010afd6219074cf6f683820 (patch) | |
tree | b41c9b78594bde90e77fa0e7b2e806e306e2ebad /src/arch/mips/utility.cc | |
parent | 997f36c7115e37f292c50db8986c6ebd4bd1beca (diff) | |
download | gem5-b398b8ff1ba7e181e010afd6219074cf6f683820.tar.xz |
Registers: Add a registers.hh file as an ISA switched header.
This file is for register indices, Num* constants, and register types.
copyRegs and copyMiscRegs were moved to utility.hh and utility.cc.
--HG--
rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh
rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh
rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh
rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh
rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh
Diffstat (limited to 'src/arch/mips/utility.cc')
-rw-r--r-- | src/arch/mips/utility.cc | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc index 5908caf68..4723d6301 100644 --- a/src/arch/mips/utility.cc +++ b/src/arch/mips/utility.cc @@ -233,18 +233,6 @@ isSnan(void *val_ptr, int size) } } -void -copyRegs(ThreadContext *src, ThreadContext *dest) -{ - panic("Copy Regs Not Implemented Yet\n"); -} - -void -copyMiscRegs(ThreadContext *src, ThreadContext *dest) -{ - panic("Copy Misc. Regs Not Implemented Yet\n"); -} - template <class CPU> void zeroRegisters(CPU *cpu) @@ -262,4 +250,16 @@ startupCPU(ThreadContext *tc, int cpuId) tc->activate(0/*tc->threadId()*/); } +void +copyRegs(ThreadContext *src, ThreadContext *dest) +{ + panic("Copy Regs Not Implemented Yet\n"); +} + +void +copyMiscRegs(ThreadContext *src, ThreadContext *dest) +{ + panic("Copy Misc. Regs Not Implemented Yet\n"); +} + } // namespace MipsISA |