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authorDerek Hower <drh5@cs.wisc.edu>2009-07-13 14:49:51 -0500
committerDerek Hower <drh5@cs.wisc.edu>2009-07-13 14:49:51 -0500
commit100da6b3267b4e3d6834cd872502b8303d289d17 (patch)
tree1a1427989468e5b6e5f8a1c1c7bb96b3bbdb6f2c /src/arch/mips/utility.cc
parentd51445490d9f7ccd09d7003f4360044422bd7b57 (diff)
parent60577eb4caff66a756f260bff6bf3bf8cb7edcba (diff)
downloadgem5-100da6b3267b4e3d6834cd872502b8303d289d17.tar.xz
merge
Diffstat (limited to 'src/arch/mips/utility.cc')
-rw-r--r--src/arch/mips/utility.cc24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc
index 5908caf68..4723d6301 100644
--- a/src/arch/mips/utility.cc
+++ b/src/arch/mips/utility.cc
@@ -233,18 +233,6 @@ isSnan(void *val_ptr, int size)
}
}
-void
-copyRegs(ThreadContext *src, ThreadContext *dest)
-{
- panic("Copy Regs Not Implemented Yet\n");
-}
-
-void
-copyMiscRegs(ThreadContext *src, ThreadContext *dest)
-{
- panic("Copy Misc. Regs Not Implemented Yet\n");
-}
-
template <class CPU>
void
zeroRegisters(CPU *cpu)
@@ -262,4 +250,16 @@ startupCPU(ThreadContext *tc, int cpuId)
tc->activate(0/*tc->threadId()*/);
}
+void
+copyRegs(ThreadContext *src, ThreadContext *dest)
+{
+ panic("Copy Regs Not Implemented Yet\n");
+}
+
+void
+copyMiscRegs(ThreadContext *src, ThreadContext *dest)
+{
+ panic("Copy Misc. Regs Not Implemented Yet\n");
+}
+
} // namespace MipsISA