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authorDerek Hower <drh5@cs.wisc.edu>2009-07-13 14:49:51 -0500
committerDerek Hower <drh5@cs.wisc.edu>2009-07-13 14:49:51 -0500
commit100da6b3267b4e3d6834cd872502b8303d289d17 (patch)
tree1a1427989468e5b6e5f8a1c1c7bb96b3bbdb6f2c /src/arch/mips/utility.hh
parentd51445490d9f7ccd09d7003f4360044422bd7b57 (diff)
parent60577eb4caff66a756f260bff6bf3bf8cb7edcba (diff)
downloadgem5-100da6b3267b4e3d6834cd872502b8303d289d17.tar.xz
merge
Diffstat (limited to 'src/arch/mips/utility.hh')
-rw-r--r--src/arch/mips/utility.hh19
1 files changed, 3 insertions, 16 deletions
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 1c77b6ff2..23c965bd4 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -98,27 +98,11 @@ namespace MipsISA {
//
// Register File Utility Functions
//
- static inline int flattenFloatIndex(ThreadContext * tc, int reg)
- {
- return reg;
- }
-
- static inline int flattenIntIndex(ThreadContext * tc, int reg)
- {
- // Implement Shadow Sets Stuff Here;
- return reg;
- }
-
static inline MachInst makeRegisterCopy(int dest, int src) {
panic("makeRegisterCopy not implemented");
return 0;
}
- void copyRegs(ThreadContext *src, ThreadContext *dest);
-
- void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
-
-
template <class CPU>
void zeroRegisters(CPU *cpu);
@@ -139,6 +123,9 @@ namespace MipsISA {
// CPU Utility
//
void startupCPU(ThreadContext *tc, int cpuId);
+
+ void copyRegs(ThreadContext *src, ThreadContext *dest);
+ void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
};