summaryrefslogtreecommitdiff
path: root/src/arch/mips
diff options
context:
space:
mode:
authorAli Saidi <saidi@eecs.umich.edu>2007-03-09 16:56:39 -0500
committerAli Saidi <saidi@eecs.umich.edu>2007-03-09 16:56:39 -0500
commit58f69391cac4dcc3696470d08756d0c5ff308963 (patch)
treec97d3888e74ccd3cf3ffdb4ee96fd475c8c8c29a /src/arch/mips
parent9d026ac006f56ce735c3c6a9e37cfefcfb21523a (diff)
downloadgem5-58f69391cac4dcc3696470d08756d0c5ff308963.tar.xz
implement ipi stufff for SPARC
src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/arch/x86/utility.hh: add hook for system to startup the cpu or not... in the case of FS sparc, only the first cpu would get spunup.. the rest sit in an idle state until they get an ipi src/arch/sparc/isa/decoder.isa: handle writable bits of strandstatus register in miscregfile src/arch/sparc/miscregfile.hh: some constants for the strand status register src/arch/sparc/ua2005.cc: properly implement the strand status register src/dev/sparc/iob.cc: implement ipi generation properly src/sim/system.cc: call into the ISA to start the CPU (or not) --HG-- extra : convert_revision : 0003b2032337d8a031a9fc044da726dbb2a9e36f
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/utility.hh7
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 56689ba4d..b5c1e31e1 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2003-2005 The Regents of The University of Michigan
+ * Copyright (c) 2007 MIPS Technologies, Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -27,6 +28,7 @@
*
* Authors: Nathan Binkert
* Steve Reinhardt
+ * Korey Sewell
*/
#ifndef __ARCH_MIPS_UTILITY_HH__
@@ -98,6 +100,11 @@ namespace MipsISA {
return ExtMachInst(inst);
#endif
}
+
+ inline void startupCPU(ThreadContext *tc, int cpuId)
+ {
+ tc->activate(0);
+ }
};