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author | Gabe Black <gblack@eecs.umich.edu> | 2010-11-15 19:37:03 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-11-15 19:37:03 -0800 |
commit | 8b9b85e92cde81ef9eb0cf6595be59c96fd13f97 (patch) | |
tree | cf5a39118cebc1595f27072b26dd3dd6b3a2e140 /src/arch/mips | |
parent | 776c07591797ccd103619de111ec27df04f96bb3 (diff) | |
download | gem5-8b9b85e92cde81ef9eb0cf6595be59c96fd13f97.tar.xz |
O3: Make O3 support variably lengthed instructions.
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/predecoder.hh | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/src/arch/mips/predecoder.hh b/src/arch/mips/predecoder.hh index f059710e5..4220b768c 100644 --- a/src/arch/mips/predecoder.hh +++ b/src/arch/mips/predecoder.hh @@ -47,9 +47,10 @@ class Predecoder ThreadContext * tc; //The extended machine instruction being generated ExtMachInst emi; + bool emiIsReady; public: - Predecoder(ThreadContext * _tc) : tc(_tc) + Predecoder(ThreadContext * _tc) : tc(_tc), emiIsReady(false) {} ThreadContext *getTC() @@ -70,7 +71,9 @@ class Predecoder void reset() - {} + { + emiIsReady = false; + } //Use this to give data to the predecoder. This should be used //when there is control flow. @@ -78,6 +81,7 @@ class Predecoder moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) { emi = inst; + emiIsReady = true; } bool @@ -89,13 +93,14 @@ class Predecoder bool extMachInstReady() { - return true; + return emiIsReady; } //This returns a constant reference to the ExtMachInst to avoid a copy const ExtMachInst & getExtMachInst(PCState &pc) { + emiIsReady = false; return emi; } }; |