Merge zizzer:/bk/sparcfs

into  zed.eecs.umich.edu:/z/hsul/work/sparc/m5

--HG--
extra : convert_revision : c6d174716641f0b8286b8478bcb9053b3eec54e3

1 files changed, 3 insertions, 3 deletions

diff --git a/src/arch/mips/isa/formats/fp.isa b/src/arch/mips/isa/formats/fp.isa
index cdb892b3f..153f3f949 100644
--- a/src/arch/mips/isa/formats/fp.isa
+++ b/src/arch/mips/isa/formats/fp.isa
@@ -99,7 +99,7 @@ output exec {{
             int size = sizeof(src_op) * 8;
 
             for (int i = 0; i < inst->numSrcRegs(); i++) {
-                uint64_t src_bits = xc->readFloatRegBits(inst, 0, size);
+                uint64_t src_bits = xc->readFloatRegOperandBits(inst, 0, size);
 
                 if (isNan(&src_bits, size) ) {
                     if (isSnan(&src_bits, size)) {
@@ -113,7 +113,7 @@ output exec {{
                         mips_nan = src_bits;
                     }
 
-                    xc->setFloatRegBits(inst, 0, mips_nan, size);
+                    xc->setFloatRegOperandBits(inst, 0, mips_nan, size);
                     if (traceData) { traceData->setData(mips_nan); }
                     return true;
                 }
@@ -139,7 +139,7 @@ output exec {{
                 }
 
                 //Set value to QNAN
-                cpu->setFloatRegBits(inst, 0, mips_nan, size);
+                cpu->setFloatRegOperandBits(inst, 0, mips_nan, size);
 
                 //Read FCSR from FloatRegFile
                 uint32_t fcsr_bits = cpu->tcBase()->readFloatRegBits(FCSR);