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authorGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:22 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-08 23:02:22 -0700
commitc9a27d85b9066489bf227f19d61ce5ddd1bc91c3 (patch)
tree9160f51be38043ae765f4b74c9baa82a7d107d39 /src/arch/mips
parent3d39b6213265ceeb14b8089190e5a097f17fdc1b (diff)
downloadgem5-c9a27d85b9066489bf227f19d61ce5ddd1bc91c3.tar.xz
Get rid of the unused get(Data|Inst)Asid and (inst|data)Asid functions.
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/isa.hh10
-rwxr-xr-xsrc/arch/mips/mips_core_specific.cc15
-rw-r--r--src/arch/mips/misc_regfile.cc11
-rw-r--r--src/arch/mips/misc_regfile.hh3
4 files changed, 0 insertions, 39 deletions
diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh
index 7380ad9f9..252c788a8 100644
--- a/src/arch/mips/isa.hh
+++ b/src/arch/mips/isa.hh
@@ -57,16 +57,6 @@ namespace MipsISA
miscRegFile.reset(core_name, num_threads, num_vpes, _cpu);
}
- int instAsid()
- {
- return miscRegFile.getInstAsid();
- }
-
- int dataAsid()
- {
- return miscRegFile.getDataAsid();
- }
-
void clear();
MiscReg readMiscRegNoEffect(int miscReg);
diff --git a/src/arch/mips/mips_core_specific.cc b/src/arch/mips/mips_core_specific.cc
index 80d856b0c..21847378f 100755
--- a/src/arch/mips/mips_core_specific.cc
+++ b/src/arch/mips/mips_core_specific.cc
@@ -109,19 +109,4 @@ MipsISA::processInterrupts(CPU *cpu)
*/
}
-
-/*int
-MipsISA::MiscRegFile::getInstAsid()
-{
- return AlphaISA::ITB_ASN_ASN(ipr[IPR_ITB_ASN]);
-}
-
-int
-MipsISA::MiscRegFile::getDataAsid()
-{
- return AlphaISA::DTB_ASN_ASN(ipr[IPR_DTB_ASN]);
- }*/
-
-
-
#endif // FULL_SYSTEM || BARE_IRON
diff --git a/src/arch/mips/misc_regfile.cc b/src/arch/mips/misc_regfile.cc
index bb4a361f7..da35dc668 100644
--- a/src/arch/mips/misc_regfile.cc
+++ b/src/arch/mips/misc_regfile.cc
@@ -167,17 +167,6 @@ MiscRegFile::expandForMultithreading(ThreadID num_threads, unsigned num_vpes)
}
}
-int MiscRegFile::getInstAsid()
-{
- MiscReg Entry_Hi = readRegNoEffect(EntryHi);
- return bits(Entry_Hi,EntryHi_ASID_HI,EntryHi_ASID_LO);
-}
-
-int MiscRegFile:: getDataAsid()
-{
- MiscReg EHi = readRegNoEffect(EntryHi);
- return bits(EHi,EntryHi_ASID_HI,EntryHi_ASID_LO);
-}
//@TODO: Use MIPS STYLE CONSTANTS (e.g. TCHALT_H instead of TCH_H)
void
MiscRegFile::reset(std::string core_name, ThreadID num_threads,
diff --git a/src/arch/mips/misc_regfile.hh b/src/arch/mips/misc_regfile.hh
index ab233abde..4983feb88 100644
--- a/src/arch/mips/misc_regfile.hh
+++ b/src/arch/mips/misc_regfile.hh
@@ -103,9 +103,6 @@ namespace MipsISA
void setReg(int misc_reg, const MiscReg &val,
ThreadContext *tc, ThreadID tid = 0);
- int getInstAsid();
- int getDataAsid();
-
//////////////////////////////////////////////////////////
//
// DECLARE INTERFACE THAT WILL ALLOW A MiscRegFile (Cop0)