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author | Gabe Black <gblack@eecs.umich.edu> | 2008-02-26 23:38:51 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2008-02-26 23:38:51 -0500 |
commit | 8b4796a367ec21d294f7318343e5bb9d7e07a53e (patch) | |
tree | 584199359a9a7aa3c7d842164b677d1a1e94a1f1 /src/arch/mips | |
parent | 7bde0285e50e3903e38dd9e6fd59ea4a98f41079 (diff) | |
download | gem5-8b4796a367ec21d294f7318343e5bb9d7e07a53e.tar.xz |
TLB: Make a TLB base class and put a virtual demapPage function in it.
--HG--
extra : convert_revision : cc0e62a5a337fd5bf332ad33bed61c0d505a936f
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/tlb.cc | 2 | ||||
-rw-r--r-- | src/arch/mips/tlb.hh | 6 |
2 files changed, 6 insertions, 2 deletions
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc index 4923e3e3a..d78aefab4 100644 --- a/src/arch/mips/tlb.cc +++ b/src/arch/mips/tlb.cc @@ -62,7 +62,7 @@ using namespace MipsISA; #define MODE2MASK(X) (1 << (X)) TLB::TLB(const Params *p) - : SimObject(p), size(p->size), nlu(0) + : BaseTLB(p), size(p->size), nlu(0) { table = new MipsISA::PTE[size]; memset(table, 0, sizeof(MipsISA::PTE[size])); diff --git a/src/arch/mips/tlb.hh b/src/arch/mips/tlb.hh index d6f9ac101..4333777ff 100644 --- a/src/arch/mips/tlb.hh +++ b/src/arch/mips/tlb.hh @@ -80,7 +80,7 @@ struct TlbEntry }; -class TLB : public SimObject +class TLB : public BaseTLB { protected: typedef std::multimap<Addr, int> PageTable; @@ -120,6 +120,10 @@ class TLB : public SimObject void insert(Addr vaddr, MipsISA::PTE &pte); void insertAt(MipsISA::PTE &pte, unsigned Index, int _smallPages); void flushAll(); + void demapPage(Addr vaddr, uint64_t asn) + { + panic("demapPage unimplemented.\n"); + } // static helper functions... really static bool validVirtualAddress(Addr vaddr); |