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authorGabe Black <gblack@eecs.umich.edu>2011-07-02 22:34:29 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-07-02 22:34:29 -0700
commitaade13769fc6c666bb855e0745e042c82f9941d6 (patch)
treeb95bd2ff43f1bb84b5d2615e12a6f7788a33a12e /src/arch/mips
parentd42e471baac69f3f853592ae001e8c5c61377cae (diff)
downloadgem5-aade13769fc6c666bb855e0745e042c82f9941d6.tar.xz
ISA: Use readBytes/writeBytes for all instruction level memory operations.
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/isa/formats/mem.isa39
-rw-r--r--src/arch/mips/isa/includes.isa1
2 files changed, 21 insertions, 19 deletions
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index c4666e4ab..bc3a2b3ce 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -216,7 +216,7 @@ def template LoadExecute {{
%(ea_code)s;
if (fault == NoFault) {
- fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
+ fault = readMemAtomic(xc, traceData, EA, Mem, memAccessFlags);
%(memacc_code)s;
}
@@ -248,7 +248,7 @@ def template LoadInitiateAcc {{
%(ea_code)s;
if (fault == NoFault) {
- fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags);
+ fault = readMemTiming(xc, traceData, EA, Mem, memAccessFlags);
}
return fault;
@@ -272,7 +272,7 @@ def template LoadCompleteAcc {{
%(op_decl)s;
%(op_rd)s;
- Mem = pkt->get<typeof(Mem)>();
+ getMem(pkt, Mem, traceData);
if (fault == NoFault) {
%(memacc_code)s;
@@ -303,8 +303,8 @@ def template StoreExecute {{
}
if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, NULL);
+ fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags,
+ NULL);
}
if (fault == NoFault) {
@@ -339,8 +339,8 @@ def template StoreFPExecute {{
}
if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, NULL);
+ fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags,
+ NULL);
}
if (fault == NoFault) {
@@ -373,8 +373,8 @@ def template StoreCondExecute {{
}
if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, &write_result);
+ fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags,
+ &write_result);
}
if (fault == NoFault) {
@@ -406,8 +406,8 @@ def template StoreInitiateAcc {{
}
if (fault == NoFault) {
- fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
- memAccessFlags, NULL);
+ fault = writeMemTiming(xc, traceData, Mem, EA, memAccessFlags,
+ NULL);
}
return fault;
@@ -559,14 +559,15 @@ def format LoadUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3;
def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3; }},
mem_flags = [], inst_flags = []) {{
- decl_code = 'uint32_t mem_word = 0;\n'
- decl_code += 'uint32_t unaligned_addr = Rs + disp;\n'
- decl_code += 'uint32_t byte_offset = unaligned_addr & 3;\n'
- decl_code += '#if BYTE_ORDER == BIG_ENDIAN\n'
- decl_code += '\tbyte_offset ^= 3;\n'
- decl_code += '#endif\n'
- decl_code += 'fault = xc->read(EA, (uint32_t&)mem_word, memAccessFlags);\n'
- #decl_code += 'xc->readFunctional(EA,(uint32_t&)mem_word);'
+ decl_code = '''
+ uint32_t mem_word = 0;
+ uint32_t unaligned_addr = Rs + disp;
+ uint32_t byte_offset = unaligned_addr & 3;
+ #if BYTE_ORDER == BIG_ENDIAN
+ byte_offset ^= 3;
+ #endif
+ fault = readMemAtomic(xc, traceData, EA, mem_word, memAccessFlags);
+ '''
memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n'
(header_output, decoder_output, decode_block, exec_output) = \
diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa
index 73d751f6e..9c1183839 100644
--- a/src/arch/mips/isa/includes.isa
+++ b/src/arch/mips/isa/includes.isa
@@ -68,6 +68,7 @@ using namespace MipsISA;
output exec {{
#include <math.h>
+#include "arch/generic/memhelpers.hh"
#include "arch/mips/dsp.hh"
#include "arch/mips/dt_constants.hh"
#include "arch/mips/faults.hh"