diff options
author | Steve Reinhardt <steve.reinhardt@amd.com> | 2011-01-07 21:50:29 -0800 |
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committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2011-01-07 21:50:29 -0800 |
commit | 6f1187943cf78c2fd0334bd7e4372ae79a587fa4 (patch) | |
tree | 8d0eac2e2f4d55d48245266d3930ad4e7f92030f /src/arch/mips | |
parent | c22be9f2f016872b05d65c82055ddc936b4aa075 (diff) | |
download | gem5-6f1187943cf78c2fd0334bd7e4372ae79a587fa4.tar.xz |
Replace curTick global variable with accessor functions.
This step makes it easy to replace the accessor functions
(which still access a global variable) with ones that access
per-thread curTick values.
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/isa.cc | 4 | ||||
-rw-r--r-- | src/arch/mips/isa/formats/mt.isa | 4 | ||||
-rw-r--r-- | src/arch/mips/locked_mem.hh | 2 | ||||
-rwxr-xr-x | src/arch/mips/mt.hh | 6 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/arch/mips/isa.cc b/src/arch/mips/isa.cc index 1cad7e4be..5cd65cfac 100644 --- a/src/arch/mips/isa.cc +++ b/src/arch/mips/isa.cc @@ -528,7 +528,7 @@ ISA::scheduleCP0Update(BaseCPU *cpu, int delay) //schedule UPDATE CP0Event *cp0_event = new CP0Event(this, cpu, UpdateCP0); - cpu->schedule(cp0_event, curTick + cpu->ticks(delay)); + cpu->schedule(cp0_event, curTick() + cpu->ticks(delay)); } } @@ -585,7 +585,7 @@ ISA::CP0Event::description() const void ISA::CP0Event::scheduleEvent(int delay) { - cpu->reschedule(this, curTick + cpu->ticks(delay), true); + cpu->reschedule(this, curTick() + cpu->ticks(delay), true); } void diff --git a/src/arch/mips/isa/formats/mt.isa b/src/arch/mips/isa/formats/mt.isa index 9d354c46a..1944d69d3 100644 --- a/src/arch/mips/isa/formats/mt.isa +++ b/src/arch/mips/isa/formats/mt.isa @@ -201,7 +201,7 @@ def format MT_Control(code, *opt_flags) {{ def format MT_MFTR(code, *flags) {{ flags += ('IsNonSpeculative', ) -# code = 'std::cerr << curTick << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code +# code = 'std::cerr << curTick() << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code code += 'if (MT_H == 1) {\n' code += 'data = bits(data, top_bit, bottom_bit);\n' @@ -217,7 +217,7 @@ def format MT_MFTR(code, *flags) {{ def format MT_MTTR(code, *flags) {{ flags += ('IsNonSpeculative', ) -# code = 'std::cerr << curTick << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code +# code = 'std::cerr << curTick() << \": T\" << xc->tcBase()->threadId() << \": Executing MT INST: ' + name + '\" << endl;\n' + code iop = InstObjParams(name, Name, 'MTOp', code, flags) header_output = BasicDeclare.subst(iop) decoder_output = BasicConstructor.subst(iop) diff --git a/src/arch/mips/locked_mem.hh b/src/arch/mips/locked_mem.hh index ddda47a0a..1cc08ee3d 100644 --- a/src/arch/mips/locked_mem.hh +++ b/src/arch/mips/locked_mem.hh @@ -85,7 +85,7 @@ handleLockedWrite(XC *xc, Request *req) if (stCondFailures % 100000 == 0) { warn("%i: context %d: %d consecutive " "store conditional failures\n", - curTick, xc->contextId(), stCondFailures); + curTick(), xc->contextId(), stCondFailures); } if (!lock_flag){ diff --git a/src/arch/mips/mt.hh b/src/arch/mips/mt.hh index 3ec6cbe70..c63c65a73 100755 --- a/src/arch/mips/mt.hh +++ b/src/arch/mips/mt.hh @@ -81,7 +81,7 @@ haltThread(TC *tc) tc->setMiscReg(MISCREG_TC_RESTART, pc.npc()); warn("%i: Halting thread %i in %s @ PC %x, setting restart PC to %x", - curTick, tc->threadId(), tc->getCpuPtr()->name(), + curTick(), tc->threadId(), tc->getCpuPtr()->name(), pc.pc(), pc.npc()); } } @@ -99,7 +99,7 @@ restoreThread(TC *tc) tc->activate(0); warn("%i: Restoring thread %i in %s @ PC %x", - curTick, tc->threadId(), tc->getCpuPtr()->name(), restartPC); + curTick(), tc->threadId(), tc->getCpuPtr()->name(), restartPC); } } @@ -208,7 +208,7 @@ yieldThread(TC *tc, Fault &fault, int src_reg, uint32_t yield_mask) tcStatus.a = 0; tc->setMiscReg(MISCREG_TC_STATUS, tcStatus); warn("%i: Deactivating Hardware Thread Context #%i", - curTick, tc->threadId()); + curTick(), tc->threadId()); } } else if (src_reg > 0) { if (src_reg && !yield_mask != 0) { |