arch: Use shared_ptr for all Faults

This patch takes quite a large step in transitioning from the ad-hoc
RefCountingPtr to the c++11 shared_ptr by adopting its use for all
Faults. There are no changes in behaviour, and the code modifications
are mostly just replacing "new" with "make_shared".

13 files changed, 37 insertions, 39 deletions

diff --git a/src/arch/mips/interrupts.cc b/src/arch/mips/interrupts.cc
index f4221ab2c..a0d9de03b 100755
--- a/src/arch/mips/interrupts.cc
+++ b/src/arch/mips/interrupts.cc
@@ -123,7 +123,7 @@ Interrupts::getInterrupt(ThreadContext * tc)
         if (status.im && cause.ip) {
             DPRINTF(Interrupt, "Interrupt! IM[7:0]=%d IP[7:0]=%d \n",
                     (unsigned)status.im, (unsigned)cause.ip);
-            return new InterruptFault;
+            return std::make_shared<InterruptFault>();
         }
     }
 
diff --git a/src/arch/mips/isa.hh b/src/arch/mips/isa.hh
index d361d4371..fea3f00ca 100644
--- a/src/arch/mips/isa.hh
+++ b/src/arch/mips/isa.hh
@@ -38,7 +38,6 @@
 #include "arch/mips/registers.hh"
 #include "arch/mips/types.hh"
 #include "sim/eventq.hh"
-#include "sim/fault_fwd.hh"
 #include "sim/sim_object.hh"
 
 class BaseCPU;
diff --git a/src/arch/mips/isa/decoder.isa b/src/arch/mips/isa/decoder.isa
index 22e34e32a..a62dbb7bb 100644
--- a/src/arch/mips/isa/decoder.isa
+++ b/src/arch/mips/isa/decoder.isa
@@ -166,10 +166,10 @@ decode OPCODE_HI default Unknown::unknown() {
                     0x4: decode FullSystemInt {
                         0: syscall_se({{ xc->syscall(R2); }},
                                 IsSerializeAfter, IsNonSpeculative);
-                        default: syscall({{ fault = new SystemCallFault(); }});
+                      default: syscall({{ fault = std::make_shared<SystemCallFault>(); }});
                     }
                     0x7: sync({{ ; }}, IsMemBarrier);
-                    0x5: break({{fault = new BreakpointFault();}});
+                  0x5: break({{fault = std::make_shared<BreakpointFault>();}});
                 }
 
             }
@@ -214,7 +214,7 @@ decode OPCODE_HI default Unknown::unknown() {
                             Rd = result = Rs + Rt;
                             if (FullSystem &&
                                     findOverflow(32, result, Rs, Rt)) {
-                                fault = new IntegerOverflowFault();
+                                fault = std::make_shared<IntegerOverflowFault>();
                             }
                         }});
                         0x1: addu({{ Rd_sw = Rs_sw + Rt_sw;}});
@@ -223,7 +223,7 @@ decode OPCODE_HI default Unknown::unknown() {
                             Rd = result = Rs - Rt;
                             if (FullSystem &&
                                     findOverflow(32, result, Rs, ~Rt)) {
-                                fault = new IntegerOverflowFault();
+                                fault = std::make_shared<IntegerOverflowFault>();
                             }
                         }});
                         0x3: subu({{ Rd_sw = Rs_sw - Rt_sw; }});
@@ -327,7 +327,7 @@ decode OPCODE_HI default Unknown::unknown() {
                 Rt = result = Rs + imm;
                 if (FullSystem &&
                         findOverflow(32, result, Rs, imm)) {
-                    fault = new IntegerOverflowFault();
+                    fault = std::make_shared<IntegerOverflowFault>();
                 }
             }});
             0x1: addiu({{ Rt_sw = Rs_sw + imm; }});
@@ -601,7 +601,7 @@ decode OPCODE_HI default Unknown::unknown() {
                                 } else {
                                     // Enable this else branch once we
                                     // actually set values for Config on init
-                                    fault = new ReservedInstructionFault();
+                                    fault = std::make_shared<ReservedInstructionFault>();
                                 }
                                 Status = status;
                             }});
@@ -612,7 +612,7 @@ decode OPCODE_HI default Unknown::unknown() {
                                     Rt = status;
                                     status.ie = 1;
                                 } else {
-                                    fault = new ReservedInstructionFault();
+                                    fault = std::make_shared<ReservedInstructionFault>();
                                 }
                             }});
                             default:CP0Unimpl::unknown();
@@ -627,7 +627,7 @@ decode OPCODE_HI default Unknown::unknown() {
                             // Rev 2 of the architecture
                             panic("Shadow Sets Not Fully Implemented.\n");
                         } else {
-                          fault = new ReservedInstructionFault();
+                            fault = std::make_shared<ReservedInstructionFault>();
                         }
                     }});
                     0xE: wrpgpr({{
@@ -636,7 +636,7 @@ decode OPCODE_HI default Unknown::unknown() {
                             // Rev 2 of the architecture
                             panic("Shadow Sets Not Fully Implemented.\n");
                         } else {
-                            fault = new ReservedInstructionFault();
+                            fault = std::make_shared<ReservedInstructionFault>();
                         }
                     }});
                 }
diff --git a/src/arch/mips/isa/formats/control.isa b/src/arch/mips/isa/formats/control.isa
index c9ef6707f..123468287 100644
--- a/src/arch/mips/isa/formats/control.isa
+++ b/src/arch/mips/isa/formats/control.isa
@@ -94,7 +94,7 @@ def template CP0Execute {{
                         %(op_wb)s;
                     }
                 } else {
-                    fault = new CoprocessorUnusableFault(0);
+                    fault = std::make_shared<CoprocessorUnusableFault>(0);
                 }
                 return fault;
         }
@@ -110,7 +110,7 @@ def template CP1Execute {{
                 if (isCoprocessorEnabled(xc, 1)) {
                     %(code)s;
                 } else {
-                    fault = new CoprocessorUnusableFault(1);
+                    fault = std::make_shared<CoprocessorUnusableFault>(1);
                 }
 
                 if(fault == NoFault)
@@ -133,13 +133,13 @@ def template ControlTLBExecute {{
                     if(isMMUTLB(xc)){
                         %(code)s;
                     } else {
-                        fault = new ReservedInstructionFault();
+                        fault = std::make_shared<ReservedInstructionFault>();
                     }
                 } else {
-                    fault = new CoprocessorUnusableFault(0);
+                    fault = std::make_shared<CoprocessorUnusableFault>(0);
                 }
             } else { // Syscall Emulation Mode - No TLB Instructions
-                fault = new ReservedInstructionFault();
+                fault = std::make_shared<ReservedInstructionFault>();
             }
 
             if (fault == NoFault) {
diff --git a/src/arch/mips/isa/formats/dsp.isa b/src/arch/mips/isa/formats/dsp.isa
index 39232bfe0..2a946ed9d 100755
--- a/src/arch/mips/isa/formats/dsp.isa
+++ b/src/arch/mips/isa/formats/dsp.isa
@@ -79,12 +79,12 @@ def template DspExecute {{
                     }
                     else
                     {
-                        fault = new DspStateDisabledFault();
+                        fault = std::make_shared<DspStateDisabledFault>();
                     }
                 }
                 else
                 {
-                    fault = new ReservedInstructionFault();
+                    fault = std::make_shared<ReservedInstructionFault>();
                 }
 
                 if(fault == NoFault)
@@ -112,12 +112,12 @@ def template DspHiLoExecute {{
                     }
                     else
                     {
-                        fault = new DspStateDisabledFault();
+                        fault = std::make_shared<DspStateDisabledFault>();
                     }
                 }
                 else
                 {
-                    fault = new ReservedInstructionFault();
+                    fault = std::make_shared<ReservedInstructionFault>();
                 }
 
                 if(fault == NoFault)
diff --git a/src/arch/mips/isa/formats/fp.isa b/src/arch/mips/isa/formats/fp.isa
index 731c6c06a..c0dff477b 100644
--- a/src/arch/mips/isa/formats/fp.isa
+++ b/src/arch/mips/isa/formats/fp.isa
@@ -97,7 +97,7 @@ output exec {{
             //@TODO: Implement correct CP0 checks to see if the CP1
             // unit is enable or not
           if (!isCoprocessorEnabled(xc, 1))
-             return new CoprocessorUnusableFault(1);
+              return std::make_shared<CoprocessorUnusableFault>(1);
 
           return NoFault;
         }
diff --git a/src/arch/mips/isa/formats/int.isa b/src/arch/mips/isa/formats/int.isa
index 42a1abfe6..52358bbdb 100644
--- a/src/arch/mips/isa/formats/int.isa
+++ b/src/arch/mips/isa/formats/int.isa
@@ -160,7 +160,7 @@ def template HiLoRsSelExecute {{
 
                 if( ACSRC > 0 && !isDspEnabled(xc) )
                 {
-                    fault = new DspStateDisabledFault();
+                    fault = std::make_shared<DspStateDisabledFault>();
                 }
                 else
                 {
@@ -186,7 +186,7 @@ def template HiLoRdSelExecute {{
 
                 if( ACDST > 0 && !isDspEnabled(xc) )
                 {
-                    fault = new DspStateDisabledFault();
+                    fault = std::make_shared<DspStateDisabledFault>();
                 }
                 else
                 {
diff --git a/src/arch/mips/isa/formats/mt.isa b/src/arch/mips/isa/formats/mt.isa
index f3369edc0..8d2254cb4 100644
--- a/src/arch/mips/isa/formats/mt.isa
+++ b/src/arch/mips/isa/formats/mt.isa
@@ -140,7 +140,7 @@ def template ThreadRegisterExecute {{
                     %(code)s;
                 }
             } else {
-                fault = new CoprocessorUnusableFault(0);
+                fault = std::make_shared<CoprocessorUnusableFault>(0);
             }
 
             if(fault == NoFault)
@@ -167,10 +167,10 @@ def template MTExecute{{
                     if (config3.mt == 1) {
                         %(code)s;
                     } else {
-                        fault = new ReservedInstructionFault();
+                        fault = std::make_shared<ReservedInstructionFault>();
                     }
                 } else {
-                    fault = new CoprocessorUnusableFault(0);
+                    fault = std::make_shared<CoprocessorUnusableFault>(0);
                 }
 
                 if(fault == NoFault)
diff --git a/src/arch/mips/isa/formats/trap.isa b/src/arch/mips/isa/formats/trap.isa
index 6f8275687..796cb5928 100644
--- a/src/arch/mips/isa/formats/trap.isa
+++ b/src/arch/mips/isa/formats/trap.isa
@@ -94,7 +94,7 @@ def format Trap(code, *flags) {{
 
         code ='bool cond;\n' + code
         code += 'if (cond) {\n'
-        code += 'fault = new TrapFault();\n};'
+        code += 'fault = std::make_shared<TrapFault>();\n};'
 
         iop = InstObjParams(name, Name, 'MipsStaticInst', code, flags)
         header_output = BasicDeclare.subst(iop)
@@ -106,7 +106,7 @@ def format TrapImm(code, *flags) {{
 
         code ='bool cond;\n' + code
         code += 'if (cond) {\n'
-        code += 'fault = new TrapFault();\n};'
+        code += 'fault = std::make_shared<TrapFault>();\n};'
         iop = InstObjParams(name, Name, 'MipsStaticInst', code, flags)
         header_output = BasicDeclare.subst(iop)
         decoder_output = BasicConstructor.subst(iop)
diff --git a/src/arch/mips/isa/formats/unimp.isa b/src/arch/mips/isa/formats/unimp.isa
index b5bcb6e5a..a51865584 100644
--- a/src/arch/mips/isa/formats/unimp.isa
+++ b/src/arch/mips/isa/formats/unimp.isa
@@ -195,9 +195,9 @@ output exec {{
     {
         if (FullSystem) {
             if (!isCoprocessorEnabled(xc, 0))
-                return new CoprocessorUnusableFault(0);
+                return std::make_shared<CoprocessorUnusableFault>(0);
             else
-                return new ReservedInstructionFault;
+                return std::make_shared<ReservedInstructionFault>();
         } else {
             panic("attempt to execute unimplemented instruction '%s' "
                     "(inst %#08x, opcode %#x, binary:%s)",
@@ -212,9 +212,9 @@ output exec {{
     {
         if (FullSystem) {
             if (!isCoprocessorEnabled(xc, 1))
-                return new CoprocessorUnusableFault(1);
+                return std::make_shared<CoprocessorUnusableFault>(1);
             else
-                return new ReservedInstructionFault;
+                return std::make_shared<ReservedInstructionFault>();
         } else {
             panic("attempt to execute unimplemented instruction '%s' "
                     "(inst %#08x, opcode %#x, binary:%s)",
@@ -229,9 +229,9 @@ output exec {{
     {
         if (FullSystem) {
             if (!isCoprocessorEnabled(xc, 2))
-                return new CoprocessorUnusableFault(2);
+                return std::make_shared<CoprocessorUnusableFault>(2);
             else
-                return new ReservedInstructionFault;
+                return std::make_shared<ReservedInstructionFault>();
         } else {
             panic("attempt to execute unimplemented instruction '%s' "
                     "(inst %#08x, opcode %#x, binary:%s)",
diff --git a/src/arch/mips/isa/formats/unknown.isa b/src/arch/mips/isa/formats/unknown.isa
index ba8fc5c07..fd6c9ea18 100644
--- a/src/arch/mips/isa/formats/unknown.isa
+++ b/src/arch/mips/isa/formats/unknown.isa
@@ -72,7 +72,7 @@ output exec {{
     Unknown::execute(CPU_EXEC_CONTEXT *xc,
                      Trace::InstRecord *traceData) const
     {
-        return new ReservedInstructionFault;
+        return std::make_shared<ReservedInstructionFault>();
     }
 }};
 
diff --git a/src/arch/mips/mt.hh b/src/arch/mips/mt.hh
index b440eefa6..cc72d7a5d 100755
--- a/src/arch/mips/mt.hh
+++ b/src/arch/mips/mt.hh
@@ -165,7 +165,7 @@ forkThread(TC *tc, Fault &fault, int Rd_bits, int Rs, int Rt)
             tc->readMiscRegNoEffect(MISCREG_VPE_CONTROL);
         vpeControl.excpt = 1;
         tc->setMiscReg(MISCREG_VPE_CONTROL, vpeControl);
-        fault = new ThreadFault();
+        fault = std::make_shared<ThreadFault>();
     }
 }
 
@@ -215,7 +215,7 @@ yieldThread(TC *tc, Fault &fault, int src_reg, uint32_t yield_mask)
             VPEControlReg vpeControl = tc->readMiscReg(MISCREG_VPE_CONTROL);
             vpeControl.excpt = 2;
             tc->setMiscReg(MISCREG_VPE_CONTROL, vpeControl);
-            fault = new ThreadFault();
+            fault = std::make_shared<ThreadFault>();
         } else {
         }
     } else if (src_reg != -2) {
@@ -225,7 +225,7 @@ yieldThread(TC *tc, Fault &fault, int src_reg, uint32_t yield_mask)
 
         if (vpeControl.ysi == 1 && tcStatus.dt == 1 ) {
             vpeControl.excpt = 4;
-            fault = new ThreadFault();
+            fault = std::make_shared<ThreadFault>();
         } else {
         }
     }
diff --git a/src/arch/mips/tlb.hh b/src/arch/mips/tlb.hh
index 706a96ff0..225e207dc 100644
--- a/src/arch/mips/tlb.hh
+++ b/src/arch/mips/tlb.hh
@@ -44,7 +44,6 @@
 #include "base/statistics.hh"
 #include "mem/request.hh"
 #include "params/MipsTLB.hh"
-#include "sim/fault_fwd.hh"
 #include "sim/sim_object.hh"
 #include "sim/tlb.hh"