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| author | Gabe Black <gabeblack@google.com> | 2018-10-12 23:09:07 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-11-06 00:35:20 +0000 |
| commit | 0167f66c130ada7a49d59d1ef4644d282cd146dc (patch) | |
| tree | 0649d57723142c7ec3279e96b47329456a60801a /src/arch/mips | |
| parent | 14b0481f7fdc355154001e842c960d6a1c2c2e1a (diff) | |
| download | gem5-0167f66c130ada7a49d59d1ef4644d282cd146dc.tar.xz | |
mips: Explicitly truncate the syscall return value down to 32 bits.
The IntReg type is 32 bits, and using it to cast the syscall return
value is appropriate, but we're attempting to get rid of the ISA
specific register types.
Change-Id: I42496dd2cc086a6b718e1ce087fef81bb897d02f
Reviewed-on: https://gem5-review.googlesource.com/c/13619
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/process.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/mips/process.cc b/src/arch/mips/process.cc index 3f65691aa..6bae08392 100644 --- a/src/arch/mips/process.cc +++ b/src/arch/mips/process.cc @@ -224,7 +224,7 @@ MipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) tc->setIntReg(ReturnValueReg, sysret.returnValue()); } else { // got an error, return details - tc->setIntReg(SyscallSuccessReg, (IntReg) -1); + tc->setIntReg(SyscallSuccessReg, (uint32_t)(-1)); tc->setIntReg(ReturnValueReg, sysret.errnoValue()); } } |