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author | Ali Saidi <Ali.Saidi@ARM.com> | 2010-10-01 16:02:46 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2010-10-01 16:02:46 -0500 |
commit | 518b5e5b1c71259ce0badc29f98db46a73c59442 (patch) | |
tree | 40260de5559f292aac501ca99f2b1f0b72098cb8 /src/arch/mips | |
parent | b331b02669f95adf4744b1e7db50ad4b231fb704 (diff) | |
download | gem5-518b5e5b1c71259ce0badc29f98db46a73c59442.tar.xz |
Debug: Implement getArgument() and function skipping for ARM.
In the process make add skipFuction() to handle isa specific function skipping
instead of ifdefs and other ugliness. For almost all ABIs, 64 bit arguments can
only start in even registers. Size is now passed to getArgument() so that 32
bit systems can make decisions about register selection for 64 bit arguments.
The number argument is now passed by reference because getArgument() will need
to change it based on the size of the argument and the current argument number.
For ARM, if the argument number is odd and a 64-bit register is requested the
number must first be incremented to because all 64 bit arguments are passed
in an even argument register. Then the number will be incremented again to
access both halves of the argument.
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/utility.cc | 11 | ||||
-rw-r--r-- | src/arch/mips/utility.hh | 4 |
2 files changed, 13 insertions, 2 deletions
diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc index ab6a00af3..7dd74551e 100644 --- a/src/arch/mips/utility.cc +++ b/src/arch/mips/utility.cc @@ -52,7 +52,7 @@ using namespace std; namespace MipsISA { uint64_t -getArgument(ThreadContext *tc, int number, bool fp) +getArgument(ThreadContext *tc, int &number, uint8_t size, bool fp) { #if FULL_SYSTEM if (number < 4) { @@ -264,5 +264,14 @@ copyMiscRegs(ThreadContext *src, ThreadContext *dest) { panic("Copy Misc. Regs Not Implemented Yet\n"); } +void +skipFunction(ThreadContext *tc) +{ + Addr newpc = tc->readIntReg(ReturnAddressReg); + tc->setPC(newpc); + tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst)); + tc->setNextPC(tc->readNextPC() + sizeof(TheISA::MachInst)); +} + } // namespace MipsISA diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh index f827e9b33..d073f3116 100644 --- a/src/arch/mips/utility.hh +++ b/src/arch/mips/utility.hh @@ -45,7 +45,7 @@ class ThreadContext; namespace MipsISA { -uint64_t getArgument(ThreadContext *tc, int number, bool fp); +uint64_t getArgument(ThreadContext *tc, int &number, uint8_t size, bool fp); //////////////////////////////////////////////////////////////////////// // @@ -103,6 +103,8 @@ void startupCPU(ThreadContext *tc, int cpuId); void copyRegs(ThreadContext *src, ThreadContext *dest); void copyMiscRegs(ThreadContext *src, ThreadContext *dest); +void skipFunction(ThreadContext *tc); + }; |