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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-09-01 17:12:43 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-09-01 17:12:43 -0700 |
| commit | abe18be544014bee31d586bf8b26ab5b622b70b7 (patch) | |
| tree | ad4059302f30b79257cb50cb8e51c5da38c6418c /src/arch/mips | |
| parent | edeb8f39a7c3cbcf428743aca3017fa42865b04a (diff) | |
| parent | d8501ec17c590a0c6f5be92e121381667ca726b6 (diff) | |
| download | gem5-abe18be544014bee31d586bf8b26ab5b622b70b7.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into vm1.(none):/home/stever/bk/newmem-head
--HG--
extra : convert_revision : 8b0fbb6b1ea38d01d048381f18fd95ab63c4c0f1
Diffstat (limited to 'src/arch/mips')
| -rw-r--r-- | src/arch/mips/isa_traits.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh index fd484e315..f85fc5bea 100644 --- a/src/arch/mips/isa_traits.hh +++ b/src/arch/mips/isa_traits.hh @@ -47,6 +47,9 @@ namespace MipsISA StaticInstPtr decodeInst(ExtMachInst); + // MIPS DOES a delay slot + #define ISA_HAS_DELAY_SLOT 1 + const Addr PageShift = 13; const Addr PageBytes = ULL(1) << PageShift; const Addr PageMask = ~(PageBytes - 1); |