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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-26 22:13:14 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-26 22:13:14 -0700 |
commit | d1e533a1e243b75b3257e2f96deb385a3b10e09b (patch) | |
tree | 5cde70506a663c83efceced11273cca47fed9586 /src/arch/mips | |
parent | 876849724d0e5a990018dc025a8166c5131be567 (diff) | |
download | gem5-d1e533a1e243b75b3257e2f96deb385a3b10e09b.tar.xz |
X86: Fix argument register indexing.
Code was assuming that all argument registers followed in order from ArgumentReg0. There is now an ArgumentReg array which is indexed to find the right index. There is a constant, NumArgumentRegs, which can be used to protect against using an invalid ArgumentReg.
--HG--
extra : convert_revision : f448a3ca4d6adc3fc3323562870f70eec05a8a1f
Diffstat (limited to 'src/arch/mips')
-rw-r--r-- | src/arch/mips/isa_traits.hh | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh index 5ab6957a3..5d4403553 100644 --- a/src/arch/mips/isa_traits.hh +++ b/src/arch/mips/isa_traits.hh @@ -74,10 +74,10 @@ namespace MipsISA const int ReturnValueReg = 2; const int ReturnValueReg1 = 2; const int ReturnValueReg2 = 3; - const int ArgumentReg0 = 4; - const int ArgumentReg1 = 5; - const int ArgumentReg2 = 6; - const int ArgumentReg3 = 7; + + const int ArgumentReg[] = {4, 5, 6, 7}; + const int NumArgumentRegs = sizeof(ArgumentReg) / sizeof(const int); + const int KernelReg0 = 26; const int KernelReg1 = 27; const int GlobalPointerReg = 28; @@ -87,7 +87,7 @@ namespace MipsISA const int SyscallNumReg = ReturnValueReg1; const int SyscallPseudoReturnReg = ReturnValueReg2; - const int SyscallSuccessReg = ArgumentReg3; + const int SyscallSuccessReg = ArgumentReg[3]; const int LogVMPageSize = 13; // 8K bytes const int VMPageSize = (1 << LogVMPageSize); |