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authorMin Kyu Jeong <minkyu.jeong@arm.com>2010-08-25 19:10:43 -0500
committerMin Kyu Jeong <minkyu.jeong@arm.com>2010-08-25 19:10:43 -0500
commite1168e72ca8ae370a1989220a202347980c6a4d2 (patch)
tree2d8b3766e7ad5261d13aa7d1a0becbf6aee2f7eb /src/arch/power/isa_traits.hh
parentedca5f7da6bad677dfc1ea69fff904554181cc17 (diff)
downloadgem5-e1168e72ca8ae370a1989220a202347980c6a4d2.tar.xz
ARM: Fixed register flattening logic (FP_Base_DepTag was set too low)
When decoding a srs instruction, invalid mode encoding returns invalid instruction. This can happen when garbage instructions are fetched from mispredicted path
Diffstat (limited to 'src/arch/power/isa_traits.hh')
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