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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2014-01-24 15:29:30 -0600 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2014-01-24 15:29:30 -0600 |
| commit | 6bed6e0352a68723ea55017b3e09a8c279af11ec (patch) | |
| tree | f7fb2a163ea470144a424bf21a7dd578754546af /src/arch/power/locked_mem.hh | |
| parent | d3444c6603afe38b00036292a854f52069b90a80 (diff) | |
| download | gem5-6bed6e0352a68723ea55017b3e09a8c279af11ec.tar.xz | |
cpu: Add CPU support for generatig wake up events when LLSC adresses are snooped.
This patch add support for generating wake-up events in the CPU when an address
that is currently in the exclusive state is hit by a snoop. This mechanism is required
for ARMv8 multi-processor support.
Diffstat (limited to 'src/arch/power/locked_mem.hh')
| -rw-r--r-- | src/arch/power/locked_mem.hh | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/arch/power/locked_mem.hh b/src/arch/power/locked_mem.hh index f3d042d5c..d962f9aff 100644 --- a/src/arch/power/locked_mem.hh +++ b/src/arch/power/locked_mem.hh @@ -60,8 +60,14 @@ handleLockedRead(XC *xc, Request *req) } template <class XC> +inline void +handleLockedSnoopHit(XC *xc) +{ +} + +template <class XC> inline bool -handleLockedWrite(XC *xc, Request *req) +handleLockedWrite(XC *xc, Request *req, Addr cacheBlockMask) { return true; } |