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authorAndreas Sandberg <Andreas.Sandberg@ARM.com>2015-02-11 10:23:27 -0500
committerAndreas Sandberg <Andreas.Sandberg@ARM.com>2015-02-11 10:23:27 -0500
commit550c31849024a2184887df87aae39617ebfe0d6a (patch)
tree53cc5e91d0961b0215c614141fdc380b30c76951 /src/arch/power
parent9e6f803254cbf3f5f491775debdc6593c3329da8 (diff)
downloadgem5-550c31849024a2184887df87aae39617ebfe0d6a.tar.xz
sim: Move the BaseTLB to src/arch/generic/
The TLB-related code is generally architecture dependent and should live in the arch directory to signify that. --HG-- rename : src/sim/BaseTLB.py => src/arch/generic/BaseTLB.py rename : src/sim/tlb.cc => src/arch/generic/tlb.cc rename : src/sim/tlb.hh => src/arch/generic/tlb.hh
Diffstat (limited to 'src/arch/power')
-rw-r--r--src/arch/power/tlb.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/power/tlb.hh b/src/arch/power/tlb.hh
index 0abafc777..9818774d8 100644
--- a/src/arch/power/tlb.hh
+++ b/src/arch/power/tlb.hh
@@ -39,6 +39,7 @@
#include <map>
+#include "arch/generic/tlb.hh"
#include "arch/power/isa_traits.hh"
#include "arch/power/pagetable.hh"
#include "arch/power/utility.hh"
@@ -46,7 +47,6 @@
#include "base/statistics.hh"
#include "mem/request.hh"
#include "params/PowerTLB.hh"
-#include "sim/tlb.hh"
class ThreadContext;