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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2013-01-07 13:05:33 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2013-01-07 13:05:33 -0500 |
| commit | 69d419f31383ac7801e1debb62d5bbf7cb899e3c (patch) | |
| tree | 8081815bc613db0126c785f0b14a6ade6a651ad1 /src/arch/power | |
| parent | 5146a69835bc9ba37fba7d3b0ff72ecaf9b98b74 (diff) | |
| download | gem5-69d419f31383ac7801e1debb62d5bbf7cb899e3c.tar.xz | |
o3: Fix issue with LLSC ordering and speculation
This patch unlocks the cpu-local monitor when the CPU sees a snoop to a locked
address. Previously we relied on the cache to handle the locking for us, however
some users on the gem5 mailing list reported a case where the cpu speculatively
executes a ll operation after a pending sc operation in the pipeline and that
makes the cache monitor valid. This should handle that case by invaliding the
local monitor.
Diffstat (limited to 'src/arch/power')
| -rw-r--r-- | src/arch/power/locked_mem.hh | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/arch/power/locked_mem.hh b/src/arch/power/locked_mem.hh index 6141b9ef2..f3d042d5c 100644 --- a/src/arch/power/locked_mem.hh +++ b/src/arch/power/locked_mem.hh @@ -41,6 +41,7 @@ * ISA-specific helper functions for locked memory accesses. */ +#include "mem/packet.hh" #include "mem/request.hh" namespace PowerISA @@ -48,6 +49,12 @@ namespace PowerISA template <class XC> inline void +handleLockedSnoop(XC *xc, PacketPtr pkt, Addr cacheBlockMask) +{ +} + +template <class XC> +inline void handleLockedRead(XC *xc, Request *req) { } |