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author | Andreas Hansson <andreas.hansson@arm.com> | 2014-01-24 15:29:30 -0600 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-01-24 15:29:30 -0600 |
commit | cfc4a999828a5b51f4c514e3a7c47b4eebc450b9 (patch) | |
tree | d84604c311cecf8c2ab48931a8b61b7bc637eef4 /src/arch/power | |
parent | 9633282fc8f152ba897347d38fa85a7b374e3d1e (diff) | |
download | gem5-cfc4a999828a5b51f4c514e3a7c47b4eebc450b9.tar.xz |
arch: Make all register index flattening const
This patch makes all the register index flattening methods const for
all the ISAs. As part of this, readMiscRegNoEffect for ARM is also
made const.
Diffstat (limited to 'src/arch/power')
-rw-r--r-- | src/arch/power/isa.hh | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/power/isa.hh b/src/arch/power/isa.hh index 028142b50..d19410037 100644 --- a/src/arch/power/isa.hh +++ b/src/arch/power/isa.hh @@ -87,26 +87,26 @@ class ISA : public SimObject } int - flattenIntIndex(int reg) + flattenIntIndex(int reg) const { return reg; } int - flattenFloatIndex(int reg) + flattenFloatIndex(int reg) const { return reg; } // dummy int - flattenCCIndex(int reg) + flattenCCIndex(int reg) const { return reg; } int - flattenMiscIndex(int reg) + flattenMiscIndex(int reg) const { return reg; } |