ISA,CPU: Generalize and split out the components of the decode cache.

This will allow it to be specialized by the ISAs. The existing caching scheme
is provided by the BasicDecodeCache in the GenericISA namespace and is built
from the generalized components.

--HG--
rename : src/cpu/decode_cache.cc => src/arch/generic/decode_cache.cc

2 files changed, 6 insertions, 4 deletions

diff --git a/src/arch/power/decoder.cc b/src/arch/power/decoder.cc
index 96fd9297b..1a6a3b38f 100644
--- a/src/arch/power/decoder.cc
+++ b/src/arch/power/decoder.cc
@@ -33,6 +33,6 @@
 namespace PowerISA
 {
 
-DecodeCache Decoder::defaultCache;
+GenericISA::BasicDecodeCache Decoder::defaultCache;
 
 }
diff --git a/src/arch/power/decoder.hh b/src/arch/power/decoder.hh
index c45473a90..60fc8ca75 100644
--- a/src/arch/power/decoder.hh
+++ b/src/arch/power/decoder.hh
@@ -31,9 +31,11 @@
 #ifndef __ARCH_POWER_DECODER_HH__
 #define __ARCH_POWER_DECODER_HH__
 
+#include "arch/generic/decode_cache.hh"
 #include "arch/types.hh"
-#include "cpu/decode_cache.hh"
-#include "cpu/static_inst_fwd.hh"
+#include "cpu/static_inst.hh"
+
+class ThreadContext;
 
 namespace PowerISA
 {
@@ -105,7 +107,7 @@ class Decoder
     }
   protected:
     /// A cache of decoded instruction objects.
-    static DecodeCache defaultCache;
+    static GenericISA::BasicDecodeCache defaultCache;
 
   public:
     StaticInstPtr decodeInst(ExtMachInst mach_inst);