diff options
author | Gabe Black <gabeblack@google.com> | 2018-10-18 17:34:08 -0700 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2019-01-22 21:15:45 +0000 |
commit | 230b892fa3f484a46f4cd77f889f8793416b91e2 (patch) | |
tree | 53b32ed7120d019399e36d04655487745bbba9ee /src/arch/power | |
parent | 774770a6410abb129e2a19de1ca50d7c0c311fef (diff) | |
download | gem5-230b892fa3f484a46f4cd77f889f8793416b91e2.tar.xz |
arch: cpu: Stop passing around misc registers by reference.
These values are all basic integers (specifically uint64_t now), and
so passing them by const & is actually less efficient since there's a
extra level of indirection and an extra value, and the same sized value
(a 64 bit pointer vs. a 64 bit int) is being passed around.
Change-Id: Ie9956b8dc4c225068ab1afaba233ec2b42b76da3
Reviewed-on: https://gem5-review.googlesource.com/c/13626
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/arch/power')
-rw-r--r-- | src/arch/power/isa.hh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/power/isa.hh b/src/arch/power/isa.hh index 9769f8fd1..4e9fdb00a 100644 --- a/src/arch/power/isa.hh +++ b/src/arch/power/isa.hh @@ -76,13 +76,13 @@ class ISA : public SimObject } void - setMiscRegNoEffect(int misc_reg, const MiscReg &val) + setMiscRegNoEffect(int misc_reg, MiscReg val) { fatal("Power does not currently have any misc regs defined\n"); } void - setMiscReg(int misc_reg, const MiscReg &val, ThreadContext *tc) + setMiscReg(int misc_reg, MiscReg val, ThreadContext *tc) { fatal("Power does not currently have any misc regs defined\n"); } |