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| author | Jose Marinho <jose.marinho@arm.com> | 2017-06-29 13:07:21 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-10 08:49:28 +0000 |
| commit | 91f965dd5708eb365f1b28d30f2c3f012519b1c2 (patch) | |
| tree | 64476ad13f084b96cab3f69a0a602bcdedba5979 /src/arch/riscv/isa.hh | |
| parent | 22e11ea8dbf6ecb6f1788ae30883106c39aa30fa (diff) | |
| download | gem5-91f965dd5708eb365f1b28d30f2c3f012519b1c2.tar.xz | |
dev-arm: Add ID registers to the GIC model
Implement GICD_IIDR, GICC_IIDR, GICD_PIDR0, GICD_PIDR1, GICD_PIDR2,
and GICD_PIDR3.
Change-Id: I4f6b5a6303907226e7d8e2f677543b3868c02e7b
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3961
Diffstat (limited to 'src/arch/riscv/isa.hh')
0 files changed, 0 insertions, 0 deletions