diff options
| author | Alec Roelke <ar4jc@virginia.edu> | 2017-11-29 14:04:11 -0500 |
|---|---|---|
| committer | Alec Roelke <ar4jc@virginia.edu> | 2017-11-30 03:58:49 +0000 |
| commit | 937ed3a0a26002bc5e015c23ecd805e4e32b2cca (patch) | |
| tree | 51187af69c471a7ca82f5e94f142ef18fd507577 /src/arch/riscv/isa/bitfields.isa | |
| parent | aed69fec188b8789675a4d3d1a712b42d4cf4f75 (diff) | |
| download | gem5-937ed3a0a26002bc5e015c23ecd805e4e32b2cca.tar.xz | |
arch-riscv: use sext rather than manual masks
Replace manual creation of masks for sign extension of immediates with
the sext<N> function.
Change-Id: Ief2df91a25500c64f5bcae0dcd437c1e3bb95e6c
Reviewed-on: https://gem5-review.googlesource.com/6182
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Diffstat (limited to 'src/arch/riscv/isa/bitfields.isa')
| -rw-r--r-- | src/arch/riscv/isa/bitfields.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/isa/bitfields.isa b/src/arch/riscv/isa/bitfields.isa index 8372ed973..903fce385 100644 --- a/src/arch/riscv/isa/bitfields.isa +++ b/src/arch/riscv/isa/bitfields.isa @@ -64,8 +64,8 @@ def bitfield IMM20 <31:12>; // SB-Type def bitfield BIMM12BIT11 <7>; def bitfield BIMM12BITS4TO1<11:8>; -def bitfield IMMSIGN <31>; def bitfield BIMM12BITS10TO5 <30:25>; +def bitfield IMMSIGN <31>; // UJ-Type def bitfield UJIMMBITS10TO1 <30:21>; |