diff options
| author | Gabe Black <gabeblack@google.com> | 2017-11-02 01:58:38 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2017-11-02 09:43:35 +0000 |
| commit | 8be75f49fd37712e7cf04c0853bb7504f69a04d6 (patch) | |
| tree | f791cd8adccee52d054f5a10b62948021a3d121b /src/arch/riscv/isa/formats/standard.isa | |
| parent | 97c68e8fc56baa39ce7901ac1f73d2ff79b550f2 (diff) | |
| download | gem5-8be75f49fd37712e7cf04c0853bb7504f69a04d6.tar.xz | |
alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.
The ISA parser used to generate different copies of exec functions
for each exec context class a particular CPU wanted to use. That's
since been changed so that those functions take a pointer to the base
ExecContext, so the code which would generate those extra functions
can be removed, and some functions which used to be templated on an
ExecContext subclass can be untemplated, or minimally less templated.
Now that some functions aren't going to be instantiated multiple times
with different signatures, there are also opportunities to collapse
templates and make many instruction definitions simpler within the
parser. Since those changes will be less mechanical, they're left for
later changes and will probably be done in smaller increments.
Change-Id: I0015307bb02dfb9c60380b56d2a820f12169ebea
Reviewed-on: https://gem5-review.googlesource.com/5381
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/riscv/isa/formats/standard.isa')
| -rw-r--r-- | src/arch/riscv/isa/formats/standard.isa | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/riscv/isa/formats/standard.isa b/src/arch/riscv/isa/formats/standard.isa index 4ef241b2c..70d6ada33 100644 --- a/src/arch/riscv/isa/formats/standard.isa +++ b/src/arch/riscv/isa/formats/standard.isa @@ -201,8 +201,8 @@ def template ImmConstructor {{ def template ImmExecute {{ Fault - %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, - Trace::InstRecord *traceData) const + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -254,7 +254,7 @@ def template BranchDeclare {{ def template BranchExecute {{ Fault - %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, + %(class_name)s::execute(ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -313,8 +313,8 @@ def template JumpDeclare {{ def template JumpExecute {{ Fault - %(class_name)s::execute(CPU_EXEC_CONTEXT *xc, - Trace::InstRecord *traceData) const + %(class_name)s::execute( + ExecContext *xc, Trace::InstRecord *traceData) const { Fault fault = NoFault; @@ -446,4 +446,4 @@ def format CSROp(code, *opt_flags) {{ decoder_output = BasicConstructor.subst(iop) decode_block = BasicDecode.subst(iop) exec_output = BasicExecute.subst(iop) -}};
\ No newline at end of file +}}; |