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authorGabe Black <gabeblack@google.com>2017-12-22 17:14:47 -0800
committerGabe Black <gabeblack@google.com>2018-01-11 06:30:15 +0000
commitad0056d2e811284870edcc5350db9fa3dbff6f2e (patch)
tree0020f2fb3b5dd7faba173b0c377fbb54b236d769 /src/arch/riscv/process.cc
parent54a9d471faab2b4ab3ef26932957b2e0d496e84e (diff)
downloadgem5-ad0056d2e811284870edcc5350db9fa3dbff6f2e.tar.xz
arch,mem: Remove the default value for page size.
This breaks one more architecture dependence outside of the ISAs. Change-Id: I071f9ed73aef78e1cd1752247c183e30854b2d28 Reviewed-on: https://gem5-review.googlesource.com/6982 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Diffstat (limited to 'src/arch/riscv/process.cc')
-rw-r--r--src/arch/riscv/process.cc4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc
index 88a093a06..44b276a4b 100644
--- a/src/arch/riscv/process.cc
+++ b/src/arch/riscv/process.cc
@@ -60,7 +60,9 @@ using namespace std;
using namespace RiscvISA;
RiscvProcess::RiscvProcess(ProcessParams *params, ObjectFile *objFile) :
- Process(params, new FuncPageTable(params->name, params->pid), objFile)
+ Process(params, new FuncPageTable(params->name, params->pid,
+ PageBytes),
+ objFile)
{
fatal_if(!params->useArchPT, "Arch page tables not implemented.");
const Addr stack_base = 0x7FFFFFFFFFFFFFFFL;