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| author | Gabe Black <gabeblack@google.com> | 2017-12-22 16:14:03 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-01-11 06:29:58 +0000 |
| commit | 54a9d471faab2b4ab3ef26932957b2e0d496e84e (patch) | |
| tree | 2fc64af43a35ca47cb2bc06461ff76f8092e1262 /src/arch/riscv/process.hh | |
| parent | c2f3f6dbff9b29730da17269397f918742559179 (diff) | |
| download | gem5-54a9d471faab2b4ab3ef26932957b2e0d496e84e.tar.xz | |
arch,mem: Move page table construction into the arch classes.
This gets rid of an awkward NoArchPageTable class, and also gives the
arch a place to inject ISA specific parameters (specifically page size)
without having to have TheISA:: in the generic version of these types.
Change-Id: I1412f303460d5c43dafdb9b3cd07af81c908a441
Reviewed-on: https://gem5-review.googlesource.com/6981
Reviewed-by: Alexandru Duțu <alexandru.dutu@amd.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/riscv/process.hh')
| -rw-r--r-- | src/arch/riscv/process.hh | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/arch/riscv/process.hh b/src/arch/riscv/process.hh index 2a27f350e..bda278ec4 100644 --- a/src/arch/riscv/process.hh +++ b/src/arch/riscv/process.hh @@ -65,8 +65,4 @@ class RiscvProcess : public Process virtual bool mmapGrowsDown() const override { return false; } }; -/* No architectural page table defined for this ISA */ -typedef NoArchPageTable ArchPageTable; - - #endif // __RISCV_PROCESS_HH__ |