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authorGabe Black <gabeblack@google.com>2018-03-27 01:20:05 -0700
committerGabe Black <gabeblack@google.com>2018-03-27 10:57:54 +0000
commit563e19d1fd151fe222af2455536d8239f5c6d3dc (patch)
tree91a22d01bd431df0acaeb305c9bc91307ae65fd1 /src/arch/riscv
parent4384493da74547e3af0537034fe2644688c388fe (diff)
downloadgem5-563e19d1fd151fe222af2455536d8239f5c6d3dc.tar.xz
arch: cpu: Make the ExtMachInst type a template argument in InstMap.
This doesn't completely hide the ISA specific ExtMachInst type inside the ISAs since it still gets applied in arch/generic, but it at least pulls it into the arch directory. Change-Id: Ic2188d59696530d7ecafdff0785d71867182701d Reviewed-on: https://gem5-review.googlesource.com/9403 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r--src/arch/riscv/decoder.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/decoder.hh b/src/arch/riscv/decoder.hh
index 91fe7873e..750321167 100644
--- a/src/arch/riscv/decoder.hh
+++ b/src/arch/riscv/decoder.hh
@@ -48,7 +48,7 @@ class ISA;
class Decoder
{
private:
- DecodeCache::InstMap instMap;
+ DecodeCache::InstMap<ExtMachInst> instMap;
bool aligned;
bool mid;
bool more;