riscv,x86: Stop using the arch Nop machine instruction unnecessarily.

That particular ExtMachInst is a convenient placeholder, but a value
of 0 in RISCV or a static uninitialized ExtMachInst (which will
therefore be all zeroes) on x86 works just as well, and removes the
need for an ISA specific constant.

Also, the idea of a universal Nop doesn't always make sense since it
could be that what, exactly, doesn't do anything depends on context
which would be lost on a constant value of an ExtMachInst. For
instance, the value of an ExtMachInst that makes sense might depend on
what mode the CPU was in, etc.

Change-Id: I1f1a43a5c607a667e11b79bcf6e059e4f7141b3f
Reviewed-on: https://gem5-review.googlesource.com/6825
Reviewed-by: Gabe Black <gabeblack@google.com>
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Gabe Black <gabeblack@google.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/src/arch/riscv/decoder.cc b/src/arch/riscv/decoder.cc
index 020c5e34e..41a52020e 100644
--- a/src/arch/riscv/decoder.cc
+++ b/src/arch/riscv/decoder.cc
@@ -45,7 +45,7 @@ void Decoder::reset()
     aligned = true;
     mid = false;
     more = true;
-    emi = NoopMachInst;
+    emi = 0;
     instDone = false;
 }