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| author | Gabe Black <gabeblack@google.com> | 2018-10-12 05:03:38 -0700 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2018-10-12 23:58:58 +0000 |
| commit | a22030133d9bed4e4e93f549b7993705421be845 (patch) | |
| tree | 5fac4e73fd4a35d6175949ed1f172e05165d2412 /src/arch/riscv | |
| parent | 657b3ce63f28fe85aedf3a71e7c459a114c0de16 (diff) | |
| download | gem5-a22030133d9bed4e4e93f549b7993705421be845.tar.xz | |
arch: Explicitly specify the endianness in the generic mem helpers.
This avoids using the accessors which automatically assume an
endianness, requiring the memory system to know what the guest ISA is.
Change-Id: I863fa4116f00e77b801a2f8ea2fbe34e7f55fd5f
Reviewed-on: https://gem5-review.googlesource.com/c/13461
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions