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| author | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2017-03-17 15:11:14 +0000 |
|---|---|---|
| committer | Nikos Nikoleris <nikos.nikoleris@arm.com> | 2017-06-13 15:54:21 +0000 |
| commit | e2bc2142d4ce6c7cd655939f7430956837343aed (patch) | |
| tree | 5031997e90667eb3a3c941c4900e9f4546ca9550 /src/arch/riscv | |
| parent | dcaa05f033ed898fa398fb2f4d3cc51335b7a013 (diff) | |
| download | gem5-e2bc2142d4ce6c7cd655939f7430956837343aed.tar.xz | |
scons: Make MOESI_CMP_directory the default ARM ruby protocol
Previously ARM binaries were by default compiled with the MI_example
protocol. The MI_example protocol cannot properly support load/store
exclusive instructions and therefore it cannot be used to simulate
multicore ARM systems. This change changes to MOESI_CMP_directory as
the default ruby protocol for ARM systems.
Change-Id: I942d950ba466aea9a75f3d8764f9f3eddd0c3baa
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2906
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/arch/riscv')
0 files changed, 0 insertions, 0 deletions