diff options
| author | Tuan Ta <qtt2@cornell.edu> | 2018-04-02 16:22:30 -0400 |
|---|---|---|
| committer | Tuan Ta <qtt2@cornell.edu> | 2019-02-08 15:25:30 +0000 |
| commit | 2eb57c7c3bb762097aa7bdab40cd37ec73996dca (patch) | |
| tree | da98da6074f99f4eb9bc581e842950d9b634b47a /src/arch/riscv | |
| parent | e437086341712f1435db655b3527ea29b3311f4e (diff) | |
| download | gem5-2eb57c7c3bb762097aa7bdab40cd37ec73996dca.tar.xz | |
riscv: fixed syscall return value
In case of failure, a syscall returns a negative value encoding the
error code. This patch makes the risc-v implementation returns the
encoded value instead of its absolute value upon a failure of a syscall.
Change-Id: I6032b0337fe1cff5b326dbc6bb3b87a415f03300
Reviewed-on: https://gem5-review.googlesource.com/c/9627
Reviewed-by: Alec Roelke <ar4jc@virginia.edu>
Maintainer: Alec Roelke <ar4jc@virginia.edu>
Diffstat (limited to 'src/arch/riscv')
| -rw-r--r-- | src/arch/riscv/process.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc index ed6de1546..16d0dc7ff 100644 --- a/src/arch/riscv/process.cc +++ b/src/arch/riscv/process.cc @@ -279,6 +279,6 @@ RiscvProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) tc->setIntReg(SyscallPseudoReturnReg, sysret.returnValue()); } else { // got an error, return details - tc->setIntReg(SyscallPseudoReturnReg, sysret.errnoValue()); + tc->setIntReg(SyscallPseudoReturnReg, sysret.encodedValue()); } } |