summaryrefslogtreecommitdiff
path: root/src/arch/riscv
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2019-10-29 15:31:04 -0700
committerGabe Black <gabeblack@google.com>2019-10-30 22:29:23 +0000
commit607df7e656304f0a2a4ca811acd758ee21b9642e (patch)
tree915761c56cb7d6888e05157a94bd627365483c4f /src/arch/riscv
parent7adc90a2970dfdc54560305ddca46c90ce519016 (diff)
downloadgem5-607df7e656304f0a2a4ca811acd758ee21b9642e.tar.xz
arch: Make endianness a property of the OS class syscalls can consume.
That way the syscall implementations won't have to find the right endianness to use on their own, typically by referring to TheISA. Change-Id: I186b2f419d5dbee72cc9b5abce7356f3143f0c83 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22363 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r--src/arch/riscv/linux/linux.hh10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/arch/riscv/linux/linux.hh b/src/arch/riscv/linux/linux.hh
index 441550a50..c3adaeeef 100644
--- a/src/arch/riscv/linux/linux.hh
+++ b/src/arch/riscv/linux/linux.hh
@@ -34,7 +34,13 @@
#include "arch/riscv/utility.hh"
#include "kern/linux/linux.hh"
-class RiscvLinux64 : public Linux
+class RiscvLinux : public Linux
+{
+ public:
+ static const ByteOrder byteOrder = LittleEndianByteOrder;
+};
+
+class RiscvLinux64 : public RiscvLinux
{
public:
static const int TGT_SIGHUP = 1;
@@ -203,7 +209,7 @@ class RiscvLinux64 : public Linux
}
};
-class RiscvLinux32 : public Linux
+class RiscvLinux32 : public RiscvLinux
{
public:
static const int TGT_SIGHUP = 1;