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authorGabe Black <gabeblack@google.com>2019-04-24 20:11:23 -0700
committerGabe Black <gabeblack@google.com>2019-04-28 05:16:01 +0000
commit9305bb6e83d57fde96c78e7b11d50914935f57d5 (patch)
treef904a16c6e20a53d1e930a9e5dbb7b14c69aa990 /src/arch/riscv
parentfce9c7a26f8c8a29d51c319c876a7bf0a32404a7 (diff)
downloadgem5-9305bb6e83d57fde96c78e7b11d50914935f57d5.tar.xz
arch, sim: Simplify the AuxVector type.
The AuxVector type has a bunch of accessors which just give access to the underlying variables through references. We might as well just make those members accessible directly. Also, the AuxVector doesn't need to handle endianness flips itself. We can tell the byteswap mechanism how to flip an AuxVector, and let it handle that for us. This gets rid of the entire .cc file which was complicated by trying to both hide the ISA specific endianness translations, and instantiate templated functions in a .cc. Change-Id: I433cd61e73e0b067b6d628fba31be4a4ec1c4cf0 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/18373 Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/riscv')
-rw-r--r--src/arch/riscv/process.cc60
1 files changed, 29 insertions, 31 deletions
diff --git a/src/arch/riscv/process.cc b/src/arch/riscv/process.cc
index 16d0dc7ff..ab8305257 100644
--- a/src/arch/riscv/process.cc
+++ b/src/arch/riscv/process.cc
@@ -139,17 +139,16 @@ RiscvProcess::argsInit(int pageSize)
stack_top -= env.size() + 1;
stack_top &= -addrSize;
- typedef AuxVector<IntType> auxv_t;
- vector<auxv_t> auxv;
+ vector<AuxVector<IntType>> auxv;
if (elfObject != nullptr) {
- auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
- auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
- auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
- auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
- auxv.push_back(auxv_t(M5_AT_PAGESZ, PageBytes));
- auxv.push_back(auxv_t(M5_AT_SECURE, 0));
- auxv.push_back(auxv_t(M5_AT_RANDOM, stack_top));
- auxv.push_back(auxv_t(M5_AT_NULL, 0));
+ auxv.emplace_back(M5_AT_ENTRY, objFile->entryPoint());
+ auxv.emplace_back(M5_AT_PHNUM, elfObject->programHeaderCount());
+ auxv.emplace_back(M5_AT_PHENT, elfObject->programHeaderSize());
+ auxv.emplace_back(M5_AT_PHDR, elfObject->programHeaderTable());
+ auxv.emplace_back(M5_AT_PAGESZ, PageBytes);
+ auxv.emplace_back(M5_AT_SECURE, 0);
+ auxv.emplace_back(M5_AT_RANDOM, stack_top);
+ auxv.emplace_back(M5_AT_NULL, 0);
}
stack_top -= (1 + argv.size()) * addrSize +
(1 + envp.size()) * addrSize +
@@ -200,30 +199,30 @@ RiscvProcess::argsInit(int pageSize)
((1 + argv.size()) * addrSize +
(1 + envp.size()) * addrSize +
addrSize + 2 * sizeof(IntType) * auxv.size()));
- memState->setStackMin(memState->getStackMin() & -2*addrSize);
+ memState->setStackMin(memState->getStackMin() & (-2 * addrSize));
Addr sp = memState->getStackMin();
const auto pushOntoStack =
- [this, &sp](const uint8_t* data, const size_t size) {
- initVirtMem.writeBlob(sp, data, size);
- sp += size;
+ [this, &sp](IntType data) {
+ initVirtMem.write(sp, data, GuestByteOrder);
+ sp += sizeof(data);
};
// Push argc and argv pointers onto stack
- IntType argc = htog((IntType)argv.size());
- DPRINTF(Stack, "Wrote argc %d to address %p\n",
- argv.size(), (void*)sp);
- pushOntoStack((uint8_t*)&argc, sizeof(IntType));
+ IntType argc = argv.size();
+ DPRINTF(Stack, "Wrote argc %d to address %#x\n", argc, sp);
+ pushOntoStack(argc);
+
for (const Addr& argPointer: argPointers) {
- DPRINTF(Stack, "Wrote argv pointer %p to address %p\n",
- (void*)argPointer, (void*)sp);
- pushOntoStack((uint8_t*)&argPointer, addrSize);
+ DPRINTF(Stack, "Wrote argv pointer %#x to address %#x\n",
+ argPointer, sp);
+ pushOntoStack(argPointer);
}
// Push env pointers onto stack
for (const Addr& envPointer: envPointers) {
- DPRINTF(Stack, "Wrote envp pointer %p to address %p\n",
- (void*)envPointer, (void*)sp);
- pushOntoStack((uint8_t*)&envPointer, addrSize);
+ DPRINTF(Stack, "Wrote envp pointer %#x to address %#x\n",
+ envPointer, sp);
+ pushOntoStack(envPointer);
}
// Push aux vector onto stack
@@ -237,13 +236,12 @@ RiscvProcess::argsInit(int pageSize)
{M5_AT_RANDOM, "M5_AT_RANDOM"},
{M5_AT_NULL, "M5_AT_NULL"}
};
- for (const AuxVector<IntType>& aux: auxv) {
- DPRINTF(Stack, "Wrote aux key %s to address %p\n",
- aux_keys[aux.getAuxType()], (void*)sp);
- pushOntoStack((uint8_t*)&aux.getAuxType(), sizeof(IntType));
- DPRINTF(Stack, "Wrote aux value %x to address %p\n",
- aux.getAuxVal(), (void*)sp);
- pushOntoStack((uint8_t*)&aux.getAuxVal(), sizeof(IntType));
+ for (const auto &aux: auxv) {
+ DPRINTF(Stack, "Wrote aux key %s to address %#x\n",
+ aux_keys[aux.type], sp);
+ pushOntoStack(aux.type);
+ DPRINTF(Stack, "Wrote aux value %x to address %#x\n", aux.val, sp);
+ pushOntoStack(aux.val);
}
ThreadContext *tc = system->getThreadContext(contextIds[0]);