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authorJoel Hestness <jthestness@gmail.com>2015-10-10 16:45:38 -0500
committerJoel Hestness <jthestness@gmail.com>2015-10-10 16:45:38 -0500
commit1f2e7c1aaa17e55b06504264e40bde1a000f2214 (patch)
tree087714697f803f238d3507a01e76240fbf696946 /src/arch/sparc/SparcInterrupts.py
parentd3d159749a0a6c3b69a9181fab8db34b6ba0f7a1 (diff)
downloadgem5-1f2e7c1aaa17e55b06504264e40bde1a000f2214.tar.xz
sim: Don't quiesce UDelayEvents with 0 latency
ARM uses UDelayEvents to emulate kernel __*udelay functions and speed up simulation. UDelayEvents call Pseudoinst::quiesceNs to quiesce the system for a specified delay. Changeset 10341:0b4d10f53c2d introduced the requirement that any quiesce process that is started must also be completed by scheduling an EndQuiesceEvent. This change causes the CPU to hang if an IsQuiesce instruction is executed, but the corresponding EndQuiesceEvent is not scheduled. Changeset 11058:d0934b57735a introduces a fix for uses of PseudoInst::quiesce* that would conditionally execute the EndQuiesceEvent. ARM UDelayEvents specify quiesce period of 0 ns (src/arch/arm/linux/system.cc), so changeset 11058 causes these events to now execute full quiesce processes, greatly increasing the total instructions executed in kernel delay loops and slowing simulation. This patch updates the UDelayEvent to conditionally execute PseudoInst::quiesceNs (**a quiesce operation**) only if the specified delay is >0 ns. The result is ARM delay loops no longer execute instructions for quiesce handling, and regression time returns to normal.
Diffstat (limited to 'src/arch/sparc/SparcInterrupts.py')
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