summaryrefslogtreecommitdiff
path: root/src/arch/sparc/asi.cc
diff options
context:
space:
mode:
authorAli Saidi <saidi@eecs.umich.edu>2006-11-23 01:42:57 -0500
committerAli Saidi <saidi@eecs.umich.edu>2006-11-23 01:42:57 -0500
commit271b9a5435ac26c836774b25ad1fa68e2351d25a (patch)
tree4e411c5f80fdc2030f147777b9a5860ad32fdb6e /src/arch/sparc/asi.cc
parentef5b842247ec3f13cc7c321324130eab0f636052 (diff)
downloadgem5-271b9a5435ac26c836774b25ad1fa68e2351d25a.tar.xz
first cut at a sparc tlb
src/arch/sparc/SConscript: Add code to serialize/unserialze tlb entries src/arch/sparc/asi.cc: src/arch/sparc/asi.hh: update asi names for how they're listed in the supplement add asis add more asi functions src/arch/sparc/isa_traits.hh: move the interrupt stuff and some basic address space stuff into isa traits src/arch/sparc/miscregfile.cc: src/arch/sparc/miscregfile.hh: add mmu registers to tlb get rid of implicit asi stuff... the tlb will handle it src/arch/sparc/regfile.hh: make isnt/dataAsid return ints not asis src/arch/sparc/tlb.cc: src/arch/sparc/tlb.hh: first cut at sparc tlb src/arch/sparc/vtophys.hh: pagatable nedes to be included here src/mem/request.hh: add asi and if the request is a memory mapped register to the requset object src/sim/host.hh: fix incorrect definition of LL --HG-- extra : convert_revision : 6c85cd1681c62c8cd8eab04f70b1f15a034b0aa3
Diffstat (limited to 'src/arch/sparc/asi.cc')
-rw-r--r--src/arch/sparc/asi.cc94
1 files changed, 54 insertions, 40 deletions
diff --git a/src/arch/sparc/asi.cc b/src/arch/sparc/asi.cc
index 00c9e041e..14e581e43 100644
--- a/src/arch/sparc/asi.cc
+++ b/src/arch/sparc/asi.cc
@@ -26,6 +26,7 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* Authors: Gabe Black
+ * Ali Saidi
*/
#include "arch/sparc/asi.hh"
@@ -37,8 +38,8 @@ namespace SparcISA
return
(asi == ASI_BLK_AIUP) ||
(asi == ASI_BLK_AIUS) ||
- (asi == ASI_BLK_AIUPL) ||
- (asi == ASI_BLK_AIUSL) ||
+ (asi == ASI_BLK_AIUP_L) ||
+ (asi == ASI_BLK_AIUS_L) ||
(asi == ASI_BLK_P) ||
(asi == ASI_BLK_S) ||
(asi == ASI_BLK_PL) ||
@@ -50,10 +51,10 @@ namespace SparcISA
return
(asi == ASI_AIUP) ||
(asi == ASI_BLK_AIUP) ||
- (asi == ASI_AIUPL) ||
- (asi == ASI_BLK_AIUPL) ||
+ (asi == ASI_AIUP_L) ||
+ (asi == ASI_BLK_AIUP_L) ||
(asi == ASI_LDTX_AIUP) ||
- (asi == ASI_LDTX_AIUPL) ||
+ (asi == ASI_LDTX_AIUP_L) ||
(asi == ASI_P) ||
(asi == ASI_PNF) ||
(asi == ASI_PL) ||
@@ -79,10 +80,10 @@ namespace SparcISA
return
(asi == ASI_AIUS) ||
(asi == ASI_BLK_AIUS) ||
- (asi == ASI_AIUSL) ||
- (asi == ASI_BLK_AIUSL) ||
+ (asi == ASI_AIUS_L) ||
+ (asi == ASI_BLK_AIUS_L) ||
(asi == ASI_LDTX_AIUS) ||
- (asi == ASI_LDTX_AIUSL) ||
+ (asi == ASI_LDTX_AIUS_L) ||
(asi == ASI_S) ||
(asi == ASI_SNF) ||
(asi == ASI_SL) ||
@@ -119,14 +120,14 @@ namespace SparcISA
(asi == ASI_AIUS) ||
(asi == ASI_BLK_AIUP) ||
(asi == ASI_BLK_AIUS) ||
- (asi == ASI_AIUPL) ||
- (asi == ASI_AIUSL) ||
- (asi == ASI_BLK_AIUPL) ||
- (asi == ASI_BLK_AIUSL) ||
+ (asi == ASI_AIUP_L) ||
+ (asi == ASI_AIUS_L) ||
+ (asi == ASI_BLK_AIUP_L) ||
+ (asi == ASI_BLK_AIUS_L) ||
(asi == ASI_LDTX_AIUP) ||
(asi == ASI_LDTX_AIUS) ||
- (asi == ASI_LDTX_AIUPL) ||
- (asi == ASI_LDTX_AIUSL);
+ (asi == ASI_LDTX_AIUP_L) ||
+ (asi == ASI_LDTX_AIUS_L);
}
bool AsiIsIO(ASI asi)
@@ -144,22 +145,21 @@ namespace SparcISA
(asi == ASI_REAL_L) ||
(asi == ASI_REAL_IO_L) ||
(asi == ASI_LDTX_REAL) ||
- (asi == ASI_LDTX_REAL_L) ||
- (asi == ASI_MMU_REAL);
+ (asi == ASI_LDTX_REAL_L);
}
bool AsiIsLittle(ASI asi)
{
return
(asi == ASI_NL) ||
- (asi == ASI_AIUPL) ||
- (asi == ASI_AIUSL) ||
+ (asi == ASI_AIUP_L) ||
+ (asi == ASI_AIUS_L) ||
(asi == ASI_REAL_L) ||
(asi == ASI_REAL_IO_L) ||
- (asi == ASI_BLK_AIUPL) ||
- (asi == ASI_BLK_AIUSL) ||
- (asi == ASI_LDTX_AIUPL) ||
- (asi == ASI_LDTX_AIUSL) ||
+ (asi == ASI_BLK_AIUP_L) ||
+ (asi == ASI_BLK_AIUS_L) ||
+ (asi == ASI_LDTX_AIUP_L) ||
+ (asi == ASI_LDTX_AIUS_L) ||
(asi == ASI_LDTX_REAL_L) ||
(asi == ASI_LDTX_NL) ||
(asi == ASI_PL) ||
@@ -189,8 +189,8 @@ namespace SparcISA
(asi == ASI_LDTX_AIUS) ||
(asi == ASI_LDTX_REAL) ||
(asi == ASI_LDTX_N) ||
- (asi == ASI_LDTX_AIUPL) ||
- (asi == ASI_LDTX_AIUSL) ||
+ (asi == ASI_LDTX_AIUP_L) ||
+ (asi == ASI_LDTX_AIUS_L) ||
(asi == ASI_LDTX_REAL_L) ||
(asi == ASI_LDTX_NL) ||
(asi == ASI_LDTX_P) ||
@@ -248,8 +248,7 @@ namespace SparcISA
bool AsiIsCmt(ASI asi)
{
return
- (asi == ASI_CMT_PER_STRAND) ||
- (asi == ASI_CMT_SHARED);
+ (asi == ASI_CMT_PER_STRAND);
}
bool AsiIsQueue(ASI asi)
@@ -257,23 +256,38 @@ namespace SparcISA
return asi == ASI_QUEUE;
}
- bool AsiIsDtlb(ASI asi)
+ bool AsiIsMmu(ASI asi)
{
- return
- (asi == ASI_DTLB_DATA_IN_REG) ||
- (asi == ASI_DTLB_DATA_ACCESS_REG) ||
- (asi == ASI_DTLB_TAG_READ_REG);
+ return asi == ASI_MMU ||
+ (asi >= ASI_DMMU_CTXT_ZERO_TSB_BASE_PS0 &&
+ asi <= ASI_IMMU_CTXT_ZERO_CONFIG) ||
+ (asi >= ASI_DMMU_CTXT_NONZERO_TSB_BASE_PS0 &&
+ asi <= ASI_IMMU_CTXT_NONZERO_CONFIG) ||
+ (asi >= ASI_IMMU &&
+ asi <= ASI_IMMU_TSB_PS1_PTR_REG) ||
+ (asi >= ASI_ITLB_DATA_IN_REG &&
+ asi <= ASI_TLB_INVALIDATE_ALL);
}
- bool AsiIsMmu(ASI asi)
+ bool AsiIsUnPriv(ASI asi)
{
- return
- (asi == ASI_MMU_CONTEXTID) ||
- (asi == ASI_IMMU) ||
- (asi == ASI_MMU_REAL) ||
- (asi == ASI_MMU) ||
- (asi == ASI_DMMU) ||
- (asi == ASI_UMMU) ||
- (asi == ASI_DMMU_DEMAP);
+ return asi >= 0x80;
+ }
+
+ bool AsiIsPriv(ASI asi)
+ {
+ return asi <= 0x2f;
}
+
+
+ bool AsiIsHPriv(ASI asi)
+ {
+ return asi >= 0x30 && asi <= 0x7f;
+ }
+
+ bool AsiIsReg(ASI asi)
+ {
+ return AsiIsMmu(asi) || AsiIsScratchPad(asi);
+ }
+
}