Add support for mmapped iprs to atomic cpu

src/arch/SConscript:
    add mmaped_ipr.hh to switch headers
src/arch/sparc/asi.hh:
    make ASI_IMPLICT=0 so by default nothing needs to be done
src/arch/sparc/miscregfile.hh:
    miscregfile no longer needs to include asi.hh
src/arch/sparc/tlb.cc:
src/arch/sparc/tlb.hh:
    implement panic instructions for mmaped ipr reads
src/cpu/simple/atomic.cc:
    add check for mmaped iprs and handle them if it exists
src/mem/request.hh:
    allocate space in the flags for mmaped iprs. Put in in the first 8 bits so that by default its fast. Move the other flags up 8 bits

--HG--
extra : convert_revision : 31255b0494588c4d06a727fe35241121d741b115

1 files changed, 1 insertions, 1 deletions

diff --git a/src/arch/sparc/asi.hh b/src/arch/sparc/asi.hh
index bd1696c78..a0d667cf3 100644
--- a/src/arch/sparc/asi.hh
+++ b/src/arch/sparc/asi.hh
@@ -35,6 +35,7 @@
 namespace SparcISA
 {
     enum ASI {
+        ASI_IMPLICIT = 0x00,
         /* Priveleged ASIs */
         //0x00-0x03 implementation dependent
         ASI_NUCLEUS = 0x4,
@@ -242,7 +243,6 @@ namespace SparcISA
         ASI_BLK_SL = 0xF9,
         ASI_BLOCK_SECONDARY_LITTLE = ASI_BLK_SL,
         //0xFA-0xFF implementation dependent
-        ASI_IMPLICIT = 0xFF,
         MAX_ASI = 0xFF
     };