diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2014-09-27 09:08:36 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-09-27 09:08:36 -0400 |
commit | 341dbf266258dcbdb1e5e9f09c244b8ac271faaf (patch) | |
tree | f071f9a91adeb0c1eb0888ae751c3ee0196bd65d /src/arch/sparc/faults.cc | |
parent | deb2200671d5b4856ca27d4286253db0d9e12a32 (diff) | |
download | gem5-341dbf266258dcbdb1e5e9f09c244b8ac271faaf.tar.xz |
arch: Use const StaticInstPtr references where possible
This patch optimises the passing of StaticInstPtr by avoiding copying
the reference-counting pointer. This avoids first incrementing and
then decrementing the reference-counting pointer.
Diffstat (limited to 'src/arch/sparc/faults.cc')
-rw-r--r-- | src/arch/sparc/faults.cc | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc index a5c8a3a4e..8ace3cb25 100644 --- a/src/arch/sparc/faults.cc +++ b/src/arch/sparc/faults.cc @@ -490,7 +490,7 @@ getPrivVector(ThreadContext *tc, Addr &PC, Addr &NPC, MiscReg TT, MiscReg TL) } void -SparcFaultBase::invoke(ThreadContext * tc, StaticInstPtr inst) +SparcFaultBase::invoke(ThreadContext * tc, const StaticInstPtr &inst) { FaultBase::invoke(tc); if (!FullSystem) @@ -551,7 +551,7 @@ SparcFaultBase::invoke(ThreadContext * tc, StaticInstPtr inst) } void -PowerOnReset::invoke(ThreadContext *tc, StaticInstPtr inst) +PowerOnReset::invoke(ThreadContext *tc, const StaticInstPtr &inst) { // For SPARC, when a system is first started, there is a power // on reset Trap which sets the processor into the following state. @@ -614,7 +614,8 @@ PowerOnReset::invoke(ThreadContext *tc, StaticInstPtr inst) } void -FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) +FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, + const StaticInstPtr &inst) { if (FullSystem) { SparcFaultBase::invoke(tc, inst); @@ -634,7 +635,7 @@ FastInstructionAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) } void -FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) +FastDataAccessMMUMiss::invoke(ThreadContext *tc, const StaticInstPtr &inst) { if (FullSystem) { SparcFaultBase::invoke(tc, inst); @@ -658,7 +659,7 @@ FastDataAccessMMUMiss::invoke(ThreadContext *tc, StaticInstPtr inst) } void -SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) +SpillNNormal::invoke(ThreadContext *tc, const StaticInstPtr &inst) { if (FullSystem) { SparcFaultBase::invoke(tc, inst); @@ -678,7 +679,7 @@ SpillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) } void -FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) +FillNNormal::invoke(ThreadContext *tc, const StaticInstPtr &inst) { if (FullSystem) { SparcFaultBase::invoke(tc, inst); @@ -698,7 +699,7 @@ FillNNormal::invoke(ThreadContext *tc, StaticInstPtr inst) } void -TrapInstruction::invoke(ThreadContext *tc, StaticInstPtr inst) +TrapInstruction::invoke(ThreadContext *tc, const StaticInstPtr &inst) { if (FullSystem) { SparcFaultBase::invoke(tc, inst); |