diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2007-02-06 18:47:42 -0500 |
---|---|---|
committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-02-06 18:47:42 -0500 |
commit | 8ffd12e807bd05a57bbe8857dbff0ecaf217fe64 (patch) | |
tree | 6515ebc54b8b0647259f06ed0aa836d5424042c3 /src/arch/sparc/interrupts.hh | |
parent | 310d8f0992637d69e270cac727ba0ff968cdb6ea (diff) | |
parent | c7a1fdacd6f378dcd1245aab289d497f801398f6 (diff) | |
download | gem5-8ffd12e807bd05a57bbe8857dbff0ecaf217fe64.tar.xz |
merge my index fix and lisa's fix
--HG--
extra : convert_revision : 5f2c7d46c96fa061bbfb66edf188d405ca600020
Diffstat (limited to 'src/arch/sparc/interrupts.hh')
-rw-r--r-- | src/arch/sparc/interrupts.hh | 257 |
1 files changed, 130 insertions, 127 deletions
diff --git a/src/arch/sparc/interrupts.hh b/src/arch/sparc/interrupts.hh index 3af4f6342..dc3b235fe 100644 --- a/src/arch/sparc/interrupts.hh +++ b/src/arch/sparc/interrupts.hh @@ -46,164 +46,167 @@ enum interrupts_t { num_interrupt_types }; - class Interrupts - { +class Interrupts +{ - private: + private: - bool interrupts[num_interrupt_types]; - int numPosted; + bool interrupts[num_interrupt_types]; + int numPosted; - public: - Interrupts() - { - for (int i = 0; i < num_interrupt_types; ++i) { - interrupts[i] = false; - } - numPosted = 0; + public: + Interrupts() + { + for (int i = 0; i < num_interrupt_types; ++i) { + interrupts[i] = false; } + numPosted = 0; + } - void post(int int_type) - { - if (int_type < 0 || int_type >= num_interrupt_types) - panic("posting unknown interrupt!\n"); - - if (interrupts[int_type] == false) { - interrupts[int_type] = true; - ++numPosted; - } + void post(int int_type) + { + if (int_type < 0 || int_type >= num_interrupt_types) + panic("posting unknown interrupt!\n"); + if (interrupts[int_type] == false) { + interrupts[int_type] = true; + ++numPosted; } + } - void post(int int_num, int index) - { - - } + void post(int int_num, int index) + { - void clear(int int_num, int index) - { + } - } + void clear(int int_num, int index) + { - void clear_all() - { + } - } + void clear_all() + { - bool check_interrupts(ThreadContext * tc) const - { - if (numPosted) - return true; - else - return false; - } + } - Fault getInterrupt(ThreadContext * tc) - { - int hpstate = tc->readMiscReg(MISCREG_HPSTATE); - int pstate = tc->readMiscReg(MISCREG_PSTATE); - bool ie = pstate & PSTATE::ie; - - // THESE ARE IN ORDER OF PRIORITY - // since there are early returns, and the highest - // priority interrupts should get serviced, - // it is v. important that new interrupts are inserted - // in the right order of processing - if (hpstate & HPSTATE::hpriv) { - if (ie) { - if (interrupts[hstick_match]) { - if (tc->readMiscReg(MISCREG_HINTP) & 1) { - interrupts[hstick_match] = false; - --numPosted; - return new HstickMatch; - } - } - if (interrupts[interrupt_vector]) { - interrupts[interrupt_vector] = false; - --numPosted; - //HAVEN'T IMPLed THIS YET - return NoFault; - } - } else { - if (interrupts[hstick_match]) { - return NoFault; - } + bool check_interrupts(ThreadContext * tc) const + { + if (numPosted) + return true; + else + return false; + } - } - } else { - if (interrupts[trap_level_zero]) { - if ((pstate & HPSTATE::tlz) && (tc->readMiscReg(MISCREG_TL) == 0)) { - interrupts[trap_level_zero] = false; - --numPosted; - return new TrapLevelZero; - } - } + Fault getInterrupt(ThreadContext * tc) + { + int hpstate = tc->readMiscReg(MISCREG_HPSTATE); + int pstate = tc->readMiscReg(MISCREG_PSTATE); + bool ie = pstate & PSTATE::ie; + + // THESE ARE IN ORDER OF PRIORITY + // since there are early returns, and the highest + // priority interrupts should get serviced, + // it is v. important that new interrupts are inserted + // in the right order of processing + if (hpstate & HPSTATE::hpriv) { + if (ie) { if (interrupts[hstick_match]) { if (tc->readMiscReg(MISCREG_HINTP) & 1) { interrupts[hstick_match] = false; --numPosted; return new HstickMatch; - } - } - if (ie) { - if (interrupts[cpu_mondo]) { - interrupts[cpu_mondo] = false; - --numPosted; - return new CpuMondo; } - if (interrupts[dev_mondo]) { - interrupts[dev_mondo] = false; - --numPosted; - return new DevMondo; + } + if (interrupts[interrupt_vector]) { + interrupts[interrupt_vector] = false; + --numPosted; + //HAVEN'T IMPLed THIS YET + return NoFault; + } + } else { + if (interrupts[hstick_match]) { + return NoFault; + } + + } + } else { + if (interrupts[trap_level_zero]) { + if ((pstate & HPSTATE::tlz) && (tc->readMiscReg(MISCREG_TL) == 0)) { + interrupts[trap_level_zero] = false; + --numPosted; + return new TrapLevelZero; + } + } + if (interrupts[hstick_match]) { + if (tc->readMiscReg(MISCREG_HINTP) & 1) { + interrupts[hstick_match] = false; + --numPosted; + return new HstickMatch; } - if (interrupts[soft_interrupt]) { - int il = InterruptLevel(tc->readMiscReg(MISCREG_SOFTINT)); - // it seems that interrupt vectors are right in - // the middle of interrupt levels with regard to - // priority, so have to check - if ((il < 6) && - interrupts[interrupt_vector]) { - // may require more details here since there - // may be lots of interrupts embedded in an - // platform interrupt vector - interrupts[interrupt_vector] = false; + } + if (ie) { + if (interrupts[cpu_mondo]) { + interrupts[cpu_mondo] = false; + --numPosted; + return new CpuMondo; + } + if (interrupts[dev_mondo]) { + interrupts[dev_mondo] = false; + --numPosted; + return new DevMondo; + } + if (interrupts[soft_interrupt]) { + int il = InterruptLevel(tc->readMiscReg(MISCREG_SOFTINT)); + // it seems that interrupt vectors are right in + // the middle of interrupt levels with regard to + // priority, so have to check + if ((il < 6) && + interrupts[interrupt_vector]) { + // may require more details here since there + // may be lots of interrupts embedded in an + // platform interrupt vector + interrupts[interrupt_vector] = false; + --numPosted; + //HAVEN'T IMPLed YET + return NoFault; + } else { + if (il > tc->readMiscReg(MISCREG_PIL)) { + uint64_t si = tc->readMiscReg(MISCREG_SOFTINT); + uint64_t more = si & ~(1 << (il + 1)); + if (!InterruptLevel(more)) { + interrupts[soft_interrupt] = false; --numPosted; - //HAVEN'T IMPLed YET - return NoFault; - } else { - if (il > tc->readMiscReg(MISCREG_PIL)) { - uint64_t si = tc->readMiscReg(MISCREG_SOFTINT); - uint64_t more = si & ~(1 << (il + 1)); - if (!InterruptLevel(more)) { - interrupts[soft_interrupt] = false; - --numPosted; - } - return new InterruptLevelN(il); } + return new InterruptLevelN(il); } } - if (interrupts[resumable_error]) { - interrupts[resumable_error] = false; - --numPosted; - return new ResumableError; - } + } + if (interrupts[resumable_error]) { + interrupts[resumable_error] = false; + --numPosted; + return new ResumableError; } } - return NoFault; } + return NoFault; + } - void updateIntrInfo(ThreadContext * tc) - { + void updateIntrInfo(ThreadContext * tc) + { - } + } - void serialize(std::ostream &os) - { - } + void serialize(std::ostream &os) + { + SERIALIZE_ARRAY(interrupts,num_interrupt_types); + SERIALIZE_SCALAR(numPosted); + } - void unserialize(Checkpoint *cp, const std::string §ion) - { - } - }; -} + void unserialize(Checkpoint *cp, const std::string §ion) + { + UNSERIALIZE_ARRAY(interrupts,num_interrupt_types); + UNSERIALIZE_SCALAR(numPosted); + } +}; +} // namespace SPARC_ISA #endif // __ARCH_SPARC_INTERRUPT_HH__ |