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authorGabe Black <gblack@eecs.umich.edu>2009-07-10 01:01:47 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-10 01:01:47 -0700
commit64fe7af51a4cfd01886bf524f4f37d7e1a31fa9f (patch)
tree14d8f641c0f42da7f9e2a2dc93af9f719d3af740 /src/arch/sparc/isa.hh
parent9993ca8280b03a390d860b9dfb6597c7ecc98a27 (diff)
downloadgem5-64fe7af51a4cfd01886bf524f4f37d7e1a31fa9f.tar.xz
SPARC: Set up a lookup table for integer register flattening.
Using a look up table changed the run time of the SPARC_FS solaris boot regression from: real 14m45.951s user 13m57.528s sys 0m3.452s to: real 12m19.777s user 12m2.685s sys 0m2.420s
Diffstat (limited to 'src/arch/sparc/isa.hh')
-rw-r--r--src/arch/sparc/isa.hh34
1 files changed, 33 insertions, 1 deletions
diff --git a/src/arch/sparc/isa.hh b/src/arch/sparc/isa.hh
index c953be01b..9b4fd50d0 100644
--- a/src/arch/sparc/isa.hh
+++ b/src/arch/sparc/isa.hh
@@ -139,6 +139,31 @@ namespace SparcISA
&ISA::processHSTickCompare> HSTickCompareEvent;
HSTickCompareEvent *hSTickCompare;
#endif
+
+ static const int NumGlobalRegs = 8;
+ static const int NumWindowedRegs = 24;
+ static const int WindowOverlap = 8;
+
+ static const int TotalGlobals = (MaxGL + 1) * NumGlobalRegs;
+ static const int RegsPerWindow = NumWindowedRegs - WindowOverlap;
+ static const int TotalWindowed = NWindows * RegsPerWindow;
+
+ enum InstIntRegOffsets {
+ CurrentGlobalsOffset = 0,
+ CurrentWindowOffset = CurrentGlobalsOffset + NumGlobalRegs,
+ MicroIntOffset = CurrentWindowOffset + NumWindowedRegs,
+ NextGlobalsOffset = MicroIntOffset + NumMicroIntRegs,
+ NextWindowOffset = NextGlobalsOffset + NumGlobalRegs,
+ PreviousGlobalsOffset = NextWindowOffset + NumWindowedRegs,
+ PreviousWindowOffset = PreviousGlobalsOffset + NumGlobalRegs,
+ TotalInstIntRegs = PreviousWindowOffset + NumWindowedRegs
+ };
+
+ RegIndex intRegMap[TotalInstIntRegs];
+ void installWindow(int cwp, int offset);
+ void installGlobals(int gl, int offset);
+ void reloadRegMap();
+
public:
void clear();
@@ -163,7 +188,14 @@ namespace SparcISA
void setMiscReg(int miscReg, const MiscReg val,
ThreadContext *tc);
- int flattenIntIndex(int reg);
+ int
+ flattenIntIndex(int reg)
+ {
+ assert(reg < TotalInstIntRegs);
+ RegIndex flatIndex = intRegMap[reg];
+ assert(flatIndex < NumIntRegs);
+ return flatIndex;
+ }
int
flattenFloatIndex(int reg)