diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-26 18:57:16 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-26 18:57:16 -0500 |
commit | 2939d7d061efc8444c06ac52f82c8aeaf0048aaf (patch) | |
tree | 8c1d047e855505581ed7d9c6ba35c8077eb0fa6f /src/arch/sparc/isa/base.isa | |
parent | 8561c8366c7c9afd7e6b52b6e2385b3c1dde95a9 (diff) | |
download | gem5-2939d7d061efc8444c06ac52f82c8aeaf0048aaf.tar.xz |
Make Sparc traceflag even more chatty
some fixes to fp instructions to use the single precision registers
if this is an fp op emit fp check code
add fpregs to m5legion struct
src/arch/sparc/floatregfile.cc:
Make Sparc traceflag even more chatty
src/arch/sparc/isa/base.isa:
add code to check if the fpu is enabled
src/arch/sparc/isa/decoder.isa:
some fixes to fp instructions to use the single precision registers
fix smul again
fix subc/subcc/subccc condition code setting
src/arch/sparc/isa/formats/basic.isa:
src/arch/sparc/isa/formats/mem/util.isa:
if this is an fp op emit fp check code
src/cpu/exetrace.cc:
check fp regs as well as int regs
src/cpu/m5legion_interface.h:
add fpregs to m5legion struct
--HG--
extra : convert_revision : e7d26d10fb8ce88f96e3a51f84b48c3b3ad2f232
Diffstat (limited to 'src/arch/sparc/isa/base.isa')
-rw-r--r-- | src/arch/sparc/isa/base.isa | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/src/arch/sparc/isa/base.isa b/src/arch/sparc/isa/base.isa index 4a806bfd0..5b65ec288 100644 --- a/src/arch/sparc/isa/base.isa +++ b/src/arch/sparc/isa/base.isa @@ -1,4 +1,4 @@ -// Copyright (c) 2006 The Regents of The University of Michigan +// Copyright (c) 2006-2007 The Regents of The University of Michigan // All rights reserved. // // Redistribution and use in source and binary forms, with or without @@ -290,3 +290,27 @@ output decoder {{ } }}; +output exec {{ + /// Check "FP enabled" machine status bit. Called when executing any FP + /// instruction in full-system mode. + /// @retval Full-system mode: NoFault if FP is enabled, FpDisabled + /// if not. Non-full-system mode: always returns NoFault. +#if FULL_SYSTEM + inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) + { + Fault fault = NoFault; // dummy... this ipr access should not fault + if (xc->readMiscRegWithEffect(MISCREG_PSTATE) & PSTATE::pef && + xc->readMiscRegWithEffect(MISCREG_FPRS) & 0x4) + return NoFault; + else + return new FpDisabled; + } +#else + inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc) + { + return NoFault; + } +#endif +}}; + + |