summaryrefslogtreecommitdiff
path: root/src/arch/sparc/isa/decoder.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2006-05-28 23:49:29 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-05-28 23:49:29 -0400
commit981471c31db18aa55f9dfacd590db1728858baaf (patch)
treee0c110d8f1ca92d912f9adbafc7b522171c4df7e /src/arch/sparc/isa/decoder.isa
parenta433cf140e939bc503de27a015eb9b80826412d7 (diff)
downloadgem5-981471c31db18aa55f9dfacd590db1728858baaf.tar.xz
Used the Priv and new HPriv instruction formats, which have been tweaked to let some checks be done by the misc reg file.
--HG-- extra : convert_revision : efee709cbab706bdb8ef7010ce153cd75a0a2ec6
Diffstat (limited to 'src/arch/sparc/isa/decoder.isa')
-rw-r--r--src/arch/sparc/isa/decoder.isa14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index fa8832920..788e455d8 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -325,12 +325,12 @@ decode OP default Unknown::unknown()
0x28: rdasr({{
Rd = xc->readMiscRegWithEffect(RS1 + AsrStart, fault);
}});
- 0x29: rdhpr({{
+ 0x29: HPriv::rdhpr({{
// XXX Need to protect with format that traps non-priv/priv
// access
Rd = xc->readMiscRegWithEffect(RS1 + HprStart, fault);
}});
- 0x2A: rdpr({{
+ 0x2A: Priv::rdpr({{
// XXX Need to protect with format that traps non-priv
// access
Rd = xc->readMiscRegWithEffect(RS1 + PrStart, fault);
@@ -397,15 +397,15 @@ decode OP default Unknown::unknown()
0x0: BasicOperate::saved({{/*Boogy Boogy*/}});
0x1: BasicOperate::restored({{/*Boogy Boogy*/}});
}
- 0x32: wrpr({{
+ 0x32: Priv::wrpr({{
// XXX Need to protect with format that traps non-priv
// access
- xc->setMiscRegWithEffect(RD + PrStart, Rs1 ^ Rs2_or_imm13);
+ fault = xc->setMiscRegWithEffect(RD + PrStart, Rs1 ^ Rs2_or_imm13);
}});
- 0x33: wrhpr({{
+ 0x33: HPriv::wrhpr({{
// XXX Need to protect with format that traps non-priv/priv
// access
- xc->setMiscRegWithEffect(RD + HprStart, Rs1 ^ Rs2_or_imm13);
+ fault = xc->setMiscRegWithEffect(RD + HprStart, Rs1 ^ Rs2_or_imm13);
}});
0x34: Trap::fpop1({{fault = new FpDisabled;}});
0x35: Trap::fpop2({{fault = new FpDisabled;}});
@@ -549,7 +549,7 @@ decode OP default Unknown::unknown()
NNPC = Tnpc + 4;
Tl = Tl - 1;
}});
- 0x1: BasicOperate::retry({{
+ 0x1: Priv::retry({{
if(Tl == 0)
return new IllegalInstruction;
Cwp = Tstate<4:0>;