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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-17 11:15:37 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-17 11:15:37 -0500 |
| commit | 729dbb60e918dbe08339ab6cc89917c3d8e24f26 (patch) | |
| tree | 257920638735ffa87f0aa33995f09460e29ba539 /src/arch/sparc/isa/decoder.isa | |
| parent | 91b56d03fc380a044564c5cfc84501f2b2849e5b (diff) | |
| download | gem5-729dbb60e918dbe08339ab6cc89917c3d8e24f26.tar.xz | |
Added in the extended twin load format
src/arch/sparc/isa/decoder.isa:
Added the extended twin load instructions
src/arch/sparc/isa/formats/mem/blockmem.isa:
Added stuff to implement the extended twin loads. This created alot of duplication which I'll deal with later.
--HG--
extra : convert_revision : 5d8bdaacbfe83d21d3a396ce30ace90aeefc54d8
Diffstat (limited to 'src/arch/sparc/isa/decoder.isa')
| -rw-r--r-- | src/arch/sparc/isa/decoder.isa | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 01fe32ef7..bbc6a8c4b 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -1126,6 +1126,18 @@ decode OP default Unknown::unknown() 0x15: FailUnimpl::lddfa_real_io(); //ASI_REAL_IO_LITTLE 0x1D: FailUnimpl::lddfa_real_io_l(); + //ASI_LDTX_REAL + 0x26: TwinLoad::ldtx_real( + {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}}); + //ASI_LDTX_N + 0x27: TwinLoad::ldtx_n( + {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}}); + //ASI_LDTX_REAL_L + 0x2E: TwinLoad::ldtx_real_l( + {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}}); + //ASI_LDTX_N_L + 0x2F: TwinLoad::ldtx_n_l( + {{RdTwin.udw = Mem.udw}}, {{EXT_ASI}}); //ASI_PRIMARY 0x80: FailUnimpl::lddfa_p(); //ASI_PRIMARY_LITTLE |