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author | Gabe Black <gabeblack@google.com> | 2017-11-06 18:38:32 -0800 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2017-11-22 00:22:16 +0000 |
commit | 695414217fdb4bfa4e6faf9fe92297c519140396 (patch) | |
tree | 1c9be9b48499838cb2d84cb998f18e3f232e913d /src/arch/sparc/isa/decoder.isa | |
parent | a5eee974589898999b4f32c6ee24044b4a4d8100 (diff) | |
download | gem5-695414217fdb4bfa4e6faf9fe92297c519140396.tar.xz |
sparc: Pull most of the Nop format out of the ISA description.
The Nop format mostly just made instructions that inherited from the
Nop base class but with different mnemonics, so there doesn't need
to be very much dynamic content.
Change-Id: I1cf5e25ca8372f9b71f56d49756879c7545c9f6c
Reviewed-on: https://gem5-review.googlesource.com/5462
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/sparc/isa/decoder.isa')
-rw-r--r-- | src/arch/sparc/isa/decoder.isa | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa index 799fff253..8c23d5f03 100644 --- a/src/arch/sparc/isa/decoder.isa +++ b/src/arch/sparc/isa/decoder.isa @@ -338,8 +338,8 @@ decode OP default Unknown::unknown() }}); // 7-14 should cause an illegal instruction exception 0x0F: decode I { - 0x0: Nop::stbar({{/*stuff*/}}, IsWriteBarrier, MemWriteOp); - 0x1: Nop::membar({{/*stuff*/}}, IsMemBarrier, MemReadOp); + 0x0: Nop::stbar(IsWriteBarrier, MemWriteOp); + 0x1: Nop::membar(IsMemBarrier, MemReadOp); } 0x10: Priv::rdpcr({{Rd = Pcr;}}); 0x11: Priv::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); @@ -1041,8 +1041,7 @@ decode OP default Unknown::unknown() } }}, IsSerializeAfter, IsNonSpeculative, IsSyscall); } - 0x3B: Nop::flush({{/*Instruction memory flush*/}}, IsWriteBarrier, - MemWriteOp); + 0x3B: Nop::flush(IsWriteBarrier, MemWriteOp); 0x3C: save({{ if (Cansave == 0) { if (Otherwin) @@ -1267,7 +1266,7 @@ decode OP default Unknown::unknown() } 0x26: stqf({{fault = std::make_shared<FpDisabled>();}}); 0x27: Store::stdf({{Mem_udw = Frd_udw;}}); - 0x2D: Nop::prefetch({{ }}); + 0x2D: Nop::prefetch(); 0x30: LoadAlt::ldfa({{Frds_uw = Mem_uw;}}); 0x32: ldqfa({{fault = std::make_shared<FpDisabled>();}}); format LoadAlt { @@ -1441,7 +1440,7 @@ decode OP default Unknown::unknown() uint32_t tmp = mem_data; Rd_uw = tmp; }}, MEM_SWAP_COND); - 0x3D: Nop::prefetcha({{ }}); + 0x3D: Nop::prefetcha(); 0x3E: CasAlt::casxa({{mem_data = gtoh(Rs2); Mem_udw = Rd_udw; }}, {{ Rd_udw = mem_data; }}, MEM_SWAP_COND); |