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author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-29 02:57:32 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-29 02:57:32 -0500 |
commit | 9adba8d98e0d73a6dcf745258da3ac2272e93a6a (patch) | |
tree | 7d0e3f442fe334e40fcaedae879f666e23905e88 /src/arch/sparc/isa/formats/mem/basicmem.isa | |
parent | ce313a15d5310aa8ee4412014e129ae26e7d18dc (diff) | |
download | gem5-9adba8d98e0d73a6dcf745258da3ac2272e93a6a.tar.xz |
Bring casa and casxa up to date
src/arch/sparc/isa/decoder.isa:
Fix up the casa and casxa instructions.
src/arch/sparc/isa/formats/formats.isa:
This is handled in loadstore.isa now
src/arch/sparc/isa/formats/mem/basicmem.isa:
src/arch/sparc/isa/formats/mem/blockmem.isa:
Renamed doSplitExecute to doDualSplitExecute. This differentiates between the version that does both a register and immediate version, and one that just does a register version.
src/arch/sparc/isa/formats/mem/mem.isa:
The cas format is handled in loadstore.isa as well now.
src/arch/sparc/isa/formats/mem/util.isa:
Reorganized things a bit to better support cas
--HG--
extra : convert_revision : 12411e89e763287e52f9825bf7a417b263c1037f
Diffstat (limited to 'src/arch/sparc/isa/formats/mem/basicmem.isa')
-rw-r--r-- | src/arch/sparc/isa/formats/mem/basicmem.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/isa/formats/mem/basicmem.isa b/src/arch/sparc/isa/formats/mem/basicmem.isa index c13194d0f..147767bbc 100644 --- a/src/arch/sparc/isa/formats/mem/basicmem.isa +++ b/src/arch/sparc/isa/formats/mem/basicmem.isa @@ -156,7 +156,7 @@ let {{ header_output = MemDeclare.subst(iop) + MemDeclare.subst(iop_imm) decoder_output = BasicConstructor.subst(iop) + BasicConstructor.subst(iop_imm) decode_block = ROrImmDecode.subst(iop) - exec_output = doSplitExecute(code, addrCalcReg, addrCalcImm, execute, + exec_output = doDualSplitExecute(code, addrCalcReg, addrCalcImm, execute, faultCode, name, name + "Imm", Name, Name + "Imm", opt_flags) return (header_output, decoder_output, exec_output, decode_block) }}; |