diff options
| author | Ali Saidi <saidi@eecs.umich.edu> | 2006-12-19 02:11:33 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-12-19 02:11:33 -0500 |
| commit | 5e9d8795f2a2642843cbb73b2637adb97935521d (patch) | |
| tree | d7d536612662733b311efa5dcdb5ca497b24fdb6 /src/arch/sparc/isa/formats/mem/util.isa | |
| parent | 6841f863c5dee6ce2028ba647254ec9ad27a57fd (diff) | |
| download | gem5-5e9d8795f2a2642843cbb73b2637adb97935521d.tar.xz | |
fix twinx loads a little bit
bugfixes and demap implementation in tlb
ignore some more differencs for one cycle
src/arch/sparc/isa/formats/mem/blockmem.isa:
twinx has 2 micro-ops
src/arch/sparc/isa/formats/mem/util.isa:
fix the fault check for twinx
src/arch/sparc/tlb.cc:
tlb bugfixes and write demapping code
src/cpu/exetrace.cc:
don't halt on a couple more instruction (ldx, stx) when things differ
beacuse of the way tlb faults are handled in legion.
--HG--
extra : convert_revision : 1e156dead6ebd58b257213625ed63c3793ef4b71
Diffstat (limited to 'src/arch/sparc/isa/formats/mem/util.isa')
| -rw-r--r-- | src/arch/sparc/isa/formats/mem/util.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa index 3f9146c21..b6e0945b7 100644 --- a/src/arch/sparc/isa/formats/mem/util.isa +++ b/src/arch/sparc/isa/formats/mem/util.isa @@ -285,9 +285,9 @@ let {{ fault = new MemAddressNotAligned; ''' TwinAlignmentFaultCheck = ''' - if(RD & 0xe) + if(RD & 0x1) fault = new IllegalInstruction; - else if(EA & 0x1f) + else if(EA & 0xf) fault = new MemAddressNotAligned; ''' # XXX Need to take care of pstate.hpriv as well. The lower ASIs |