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authorGabe Black <gblack@eecs.umich.edu>2006-12-16 12:55:15 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-12-16 12:55:15 -0500
commitc9f18981f9283095548c37aea6e7b2db648b70b0 (patch)
treea6141c7e385f979673f1a1d380262cb3ab0f7572 /src/arch/sparc/isa/formats/mem/util.isa
parent385a3ff05433fcc4eca032505d0ce1bb2ca7201c (diff)
parentb9d069167cc4700495a5ccaf938093731208dca8 (diff)
downloadgem5-c9f18981f9283095548c37aea6e7b2db648b70b0.tar.xz
Merge zizzer:/bk/sparcfs/
into zower.eecs.umich.edu:/eecshome/m5/sparcfs --HG-- extra : convert_revision : 2764b356ef01d1fcb6ed272e4ef96179cd651d4e
Diffstat (limited to 'src/arch/sparc/isa/formats/mem/util.isa')
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index 3e9fd7a7d..3f9146c21 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -284,6 +284,12 @@ let {{
else if(EA & 0x3f)
fault = new MemAddressNotAligned;
'''
+ TwinAlignmentFaultCheck = '''
+ if(RD & 0xe)
+ fault = new IllegalInstruction;
+ else if(EA & 0x1f)
+ fault = new MemAddressNotAligned;
+ '''
# XXX Need to take care of pstate.hpriv as well. The lower ASIs
# are split into ones that are available in priv and hpriv, and
# those that are only available in hpriv